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Publication Type	Technical report
School or College	College of Engineering
Department	Computing, School of
Creator	Carter, Tony Marvin
Title	ASSASSIN: an assembly, specification and analysis system for speed-independent control-unit design in integrated circuits using path-programmable logic (PPL)
Date	1982-06
Description	Abstract: Numerous efforts have been made to automatically implement the control-units and datapaths of synchronous systems in integrated circuits. Speed-independent systems have not yet been extensively explored in the context of the integrated circuit. Presented in this thesis is a software system--ASSASSIN: an Assembly, Specification and Analysis System for Speed-Independent Control-Unit Design--which aids the systems designer in specification, simulation and implementation. PSL (Portable Standard LISP) is used as the implementation language for ASSASSIN. It is shown that the implementation of speed-independent control-units implemented using well-known techniques is feasible and shows that PPL is indeed amenable to CAD tool development. It also demonstrates the power and appropriateness of a PSL based environment for VLSI design.
Type	Text
Publisher	University of Utah
Subject	path-programmable logic; integrated circuits; Portable standard LISP; VLSI design
Subject LCSH	Integrated circuits--Research; Integrated circuits--Computer-aided design
Language	eng
Series	University of Utah Computer Science Technical Report
Relation is Part of	ARPANET
Format Medium	application/pdf
Format Extent	223,355,153 bytes
File Name	Carter-Assasin_A_CAD_System.pdf
Conversion Specifications	Original scanned with Kirtas 2400 and saved as 400 ppi uncompressed TIFF. PDF generated by LIMB™ for CONTENTdm display
ARK	ark:/87278/s6v14r1p
Setname	ir_computersa
ID	106839
Reference URL	https://collections.lib.utah.edu/ark:/87278/s6v14r1p

Page Metadata

Title	Page 165
Setname	ir_computersa
ID	106836
OCR Text	Show 152 396-#07. 72. K. F. Smith, "Desigp' of Integrated Circuits with structured Logj.c Using the Storage/LogiC Array (SLA): Definition and Implementation," PhD dissertation, Department of Canputer Science, University of Utah, March 19􁪽􋴲2. 73. K. F. Smith; T. M. Carter; and C. E. Hunt, "Structured LogiQ Design of Integrated Circuits U sing the Stored Logi.c Array, " IEEE Journal of Solid-State Circuits, Vol. tbd, No. tbd, April 19B2, pp. tbd.- -- -- 74. S. M. ornstein; M. J. Stucki; and W. A. Clark, "Logical Design of Macromodules," SJCC, 1967, pp. 351-3b#. 75. A. Tuszynski, "Enhanced Programmable Logie Arrays,"· Proceedings of the Semi-􁪽􋵉 Integrated Circuit Technology SYeposium, Institute tor Defense AnalysiS, SQience and Technology Division, May 19B1, pp. 251-210, IDA Log. No. HQ a1-23b#b 76. CirCuits, -Wiley- 17. Utan Symbolic Computation Group, "The Portable Standard LISP User's Manual, " Tech. report Ti- 10, Department of Computer Sc1enee, University of Utah, January 19B􁪽􋴬, In Section 23.13 7B. J. E. VoIder, "Toe CORDIC Trigonometric Computing Technique," IRE Transactions on Electronic Computers, Vol. Volumn Number Un􁪽􋴚􁪽􋵯own, September-'959, pp. 330=334. 79. S. Waser, "PAL: Fast Semi-eustom Solution for the Milit.ary," Proceedings of the Semi-􁪽􋵉 Integrated Circuit Technology Symposium, Institute for Defense Analysis, Science and Technology Division, May 1981, pp. 159-175, IDA Log. No. HQ C!1-2364b BO. Design for Programmed Logic Arrays," SyPlposium 􁪽􋵃 Computer Diet-meyer, 96-101. 01. R. A. Wood, "A High Density Programmable Logic Array Chip," IEEE Transactions 􁪽􋵃 Computers, Vol. C-28, No.9, September '919,􁪽􋴰 002-608. B2. T. Yoshimura and E. S. Kua , "Efficient Algorithms for Channel Routing, " IEEE Transactions on· Computer-Aided Design of Integrated CirCuits and Systems, Vol. CAD- 1, No.1, January 19B2, pp. 25-35.
Reference URL	https://collections.lib.utah.edu/ark:/87278/s6v14r1p/106836