ASSASSIN: an assembly, specification and analysis system for speed-independent control-unit design in integrated circuits using path-programmable logic (PPL)

Page 93

80 contain 'O's in both columns 2 and 3. RI 21 01 WI 20 I N I 19 01 • I 1 ts Column Number 1 1 1 1 111 1 1 1 222 2 o 1 2 3 􁪽􋴵 5 0 7 􁪽􋴹 9 0 123 􁪽􋴵 5 b 7 􁪽􋴹 9 0 , 2 3 1-1-1-I+-P-OI-I-I+-P-11-1-1-1-1-IP-R-11-1-1-1-1-1 -: ::-':-::-:-:-:--::----- 1-1-1-1+-1-P 1-1-1 +-1-P 1 P-+-111-P---SI-I-I-I-I-I-l -::::: -:::: --:: ---: ----- 17 I I I I I A IIITIIIII 111' 12131 I I 1 I I I I I I I I I I I 1 B ITIII1III 121􁪽􋴱15101 I I I 1 I I I I 1 I I I I C ITIII D 13171 I 1 1 1 I I I I I ITIII E I􁪽􋵉I􁪽􋵉I I I 1 1 I I F Figure 10: Compl1ati'on of Boolean Expressions - BIG Figure 17 shows both conditional and unconditional output generation from states and transitions. unconditional outputs controlled by state A. The ", in column 1 senses that state A is active. The '+'s in columns 0 and 13 implement the "HOLD' 01,02;" statement, the'S' in column 17 implements the "RESET 03" statement and the 'R' in column 10 implements the "SET 04" Row 22 implements the used to set it. statement. The'S' is used to reset a LATCH2 PPb cell and the 'R' is Rows 24 and 25 implement the conditional outputs controlled by state B •. Row 2􁪽􋵤 detects the nI􁪽􋵯 or 15" condition and HOLDs 05 and 02 and resets 04. Row 25 detects the "I3" condition and sets 03. The last row segment on row 20 (11-P-----SI) implements the __ unconditional output (03) controlled by the JOIN transition from states B and C ·to F. Row 26 implements the, "if BIG then set O􁪽􋴢" statement from the JOIN transition in state C.