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Show PROPERTY OF COMPUrr.R SCLNCE LIBRARY 3147 MEB LJNJYERSITY ·OE :UTAH iplementation allowed for the efficient implementa tion of CHAPTER !I THE SPEED-INDEPENDENT PPL IMPLEMENTATION Path Programmable Logic (PPL) is a recent offspring of the SLA. The SLA was originally presented by Pat1l in [59J, further elaborated on L [60J and has been described in detail by smith [69, 70, 71, 73). Smith describes the implementation of the SLA in the previously cited papers and has perhaps written the definitive reference on SLA implementation and utility in his PhD 'di'ss'ertatioD (72). In [7, 8,9,68,71) and in the CMOS section of [72), there is_a marked departure from the original SLA design philosophy. Prior to the CMOS SLA implementation, the SLA design methodology consisted of using completely predefined building blocks such as flip-flops, inverters and row elements to describe an integrated circuit. Such a philosophy could 1 ead only to a certain degree of freedom in the integrated circuit design process. This degree of freedom would allow for a particular design style utilizing a rubber-stamp form of hierarchy, effectively restricting the ingenious integrated circuit designer to a non-optimal and non-optimizable design strategy. The CMOS SLA ynchronous and dynamic circuit elements, something not present in any previous SLA implementation except the now defunct 12L asynch:-onous iI:lplementa':ion. The deSign of a CORDIC |
