| OCR Text |
Show 62 an accumulation of capacitance between them. Whenever the record is accessed by the pair of nodes, some new capacitance is added to the_ existing capacitance. After all nodes have been accumulated, the program would iterate through all records to simplify or dump the values. The kinds of extensions that are easy to add in this environment include four data fields that track a count of occurrences, a maximum occurrence, and the location of that maximum. Within a large IC design, for example, parallel runs in close proximity have a coupling capacitance, and the design criterion often states that tbere is a maximum length over which two runs can be in close proximity. This design restriction involves some fairly tedious work, because it involves locating signals as pairs, tracking them, and moving them apart at regular intervals. In the effort to maximize the distribution of capacitance, there is a considerable conceptual problem with where coupling capacitances are occurring. This work is so tedious that it is often left until first silicon has been achieved to prove the design, and the consequence of this effort becomes a speed enhancement in a later revision. Where these efforts have been done in conjunction with welldesigned clock drivers, silicon speeds in excess of 200Mhz for microprocessor designs have been achieved. Such an analysis in ACRE would let an IC designer find nodes with couplings above a threshold and the locations which provided most of that coupling. With a design methodology that used hand-crafted design, an iteration of design manipulation, design verification, and such a parasitic extraction could increase the final speed of the chip. This extraction would not |
