| OCR Text |
Show 54 some technique such as piece-wise linear analysis to compute analog behavior. For two parallel wires, the simplest high band pass equivalent circuit has the model of a single capacitor and a single resistor in series. The resistance of the termination plus the resistance of one wire is the worst-case resistance, and the coupling capacitance between the two wires is the worse-case capacitance. Of course the system could be modeled with a distributed RC coupling, but this is a simplistic approach to compute a voltage spike given the resistance, the capacitance, and the dV/dT of the driving signal. If ACRE has accumulated the capacitance on a node and lumped it into one value, computed the resistance of one wire and added it to the resistance of the driving gate, and taken a maximum dV/dT from a technology description, this could be applied to determine a very approximate worst case voltage spike. A capacitor will pass a voltage from one plate to the other in zero time, and the voltage will decay given a path to ground. As a function of the capacitance and resistance, the time constant ,; = RC is an approximate number to use in the analysis of the node. The voltage decay given a time t is e -tft , so for two time constants, for example, 0.135 of the applied voltage remains on the other side of the capacitor. In zero time, if the driving pulse went immediately to its full potential, the voltage on the other plate would also be the full potential. Fortunately signals do not have an infinite dV /dT or the coupling capacitance would pass so much noise that building circuits would be |
