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Publication Type	technical report
School or College	College of Engineering
Department	Computing, School of
Creator	Gu, Jun
Title	Parallel Algorithms and Architectures for Very Fast AI Search
Date	1989-08
Description	A wide range of problems in natural and artificial intelligence, computer vision, computer graphics, database engineering, operations research, symbolic logic, robot manipulation and hardware design automation are special cases of Consistent Labeling Problems (CLP). CLP has long been viewed as an efficient computational model based on a unit constraint relation containing 2N-tuples of units and labels which specifies which N-tuples of labels are compatible with which N-tuples of units. Due to high computation cost and design complexity, most currently best-known algorithms and computer architectures have usually proven infeasible for solving the consistent labeling problems. Efficiency in CLP computation during the last decade has only been improved a few times. This research presents several parallel algorithms and computer architectures for solving CLP within a parallel processing framework. For problems of practical interest, 4 to 10 orders of magnitude of efficiency improvement can be easily reached. Several simple wafer scale computer architectures are given which implement these parallel algorithms at a surprisingly low cost.
Type	Text
Subject	parallel algorithms; CLP; consistent labeling problems; computer programming; computer science
Language	eng
Bibliographic Citation	Gu, J. (1989). Parallel algorithms and architectures for very fast AI search.
Series	University of Utah Computer Science Technical Report
Relation is Part of	ARPANET
Format Medium	application/pdf
Format Extent	116,876,932 bytes
File Name	Gu-Parallel_Algorithms.pdf
Conversion Specifications	Original scanned with Kirtas 2400 and saved as 400 ppi uncompressed TIFF. PDF generated by Adobe Acrobat Pro X for CONTENTdm display
ARK	ark:/87278/s69s3s9x
Setname	ir_computersa
ID	99969
Reference URL	https://collections.lib.utah.edu/ark:/87278/s69s3s9x

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Title	Page 317
Setname	ir_computersa
ID	99965
OCR Text	Show 299 [148) Physical Design Automation of VLSI Systems. The Benjamin/Cummings Publishing Company, Inc., Menlo Park, California, 1988. [149) U. V. Premkumar. Resource Allocation in Rectangular SW Banyans. In The 9th International Symposium on Computer Architecture, pages 326- 333, IEEE Computer Society Press, 1982. [150) R. A. Pucel, editor. Monolithic Microwave Integrated Circuits. IEEE Press, New York, 1985. [151) P. W. Purdom. Search Rearrangement Backt~acking and Polynomial Average Time. Artificial Intelligence, 21:117-133, 1983. [152) P. W. Purdom. Tree Size by Partial Backtracking. SIAM J. Comput., 7(4):481-491, Nov. 1978. [153) P. W. Purdom and C. A. Brown. An Analysis of Backtracking with Search Rearrangement. SIAM J. Comput., 12(4):717-733, Nov. 1983. [154) P. W. Purdom, C. A. Brown, and E. L. Robertson. Backtracking with Multilevel Dynamic Search Rearrangement. Acta Informatica, 15:99-113, 1981. [155) M. J. Quinn and N. Deo. Parallel Graph Algorithms. Computing Surveys, 16(3):319-348, Sept. 1984. [156) S. K. Rao. Regular Iterative Algorithms and Their Implementation on Processor Arrays. PhD thesis, Stanford University, Dept. of Electrical Engineering, Oct. 1985. [157) S. K. Rao and T. Kailath. Regular Iterative Al~orithms and Their Implementation on Processor Array. Proc. of IEEE, 76( 3):259-269, Mar. 1988. [158) D. A. Reed and R. M. Fujimoto. Multicomputer Networks: Message-Based Parallel Processing. The MIT Press, Cambridge, MA, 1987. [159] A. L. Rosenberg. The Diogenes Approach To Testable Fault-Tolerant Arrays of Processors. IEEE Trans. on Computer, C-32(10):902-910, Oct. 1983. [160) A. Rosenfeld. Computer Vision: Basic Principles. IEEE Proceedings, 76(8):863-868, Aug. 1988. [161] J.P. Roth, W. G. Bouricius, and P.R. Schneider. Programmed Algorithms to Compute Tests to Detect and Distinguish Between Failures in Logic Circuits. IEEE Trans. On Electron. Computers, EC-16(5):567-580, Oct. 1967. [162) A. Samal. Parallel Split-Level Relaxation. PhD thesis, Dept. of Computer Science, Univ. of Utah, Aug. 1988. (163) A. Samal and T.C. Henderson. Parallel Consistent Labeling Algorithms. International Journal of Parallel Programming, 1988. · [164) J. Savage. The Complexity of Computing. John Wiley & Sons, New York, 1976. [165) J. Savage. Area-Time Tradeoffs for Matrix Multiplication and Related Problems in VLSI Models. J. Comput. Syst. Sci., 22(2):230-242, Apr. 1981.
Reference URL	https://collections.lib.utah.edu/ark:/87278/s69s3s9x/99965