| OCR Text |
Show APPENDIX HBT SEMICUSTOM CELL LIBRARY The HBT semicustom cell library was designed in the course of sigma-delta modulator design, and contains all the cells that have been used in the design of the chip. In the semicustom design, the transistors and diodes in the cells are free to be placed anywhere to make the cell as compact as possible, but the via ports for vee and VEE have a restriction that they have to be atleast 10 units apart. The general scheme that was used in designing most of the cells was to place the vee via at the top of the cell and the VEE via at the bottom of the cell. Every cell is long enough to allow the 10 unit separation for the two vias, and thus confine to the above requirement. These cells have to be placed in the chip in such a way that the via ports are directly below the respective metal strips on the third layer metal. This means that most of the cells designed in this pattern have to placed between two metal 3 rails, the top one being vee and the bottom one VEE. If need arises such that the cells have to placed between a top VEE and bottom vee, then the cell can be modified by moving the via ports to the appropriate locations, and then used in the design. In most designs, the routing takes up a big chunk of space, and hence this type of restriction on the placement of the cells is not a major limitation as the remaining space between the two layers of cells can be used for routing. All the cells use OV and -8.0V for power and ground and the reference voltage used to drive the current source transistors is -6.2V. While the ground and power are routed on Metal 3, the reference voltage is routed on Metal 2. |