| OCR Text |
Show CHAPTER 6 SIMULATIONS AND RESULTS The circuits designed in ACME were simulated using HSPICE to check for functionality and timing. After the circuit was designed in ACME, the Spice netlist was extracted directly from ACME, which was then used for simulation of the circuit. Two types of netlists were extracted from ACME, one was a functional netlist which only checked to see if the circuit was connected correctly, and if it simulates according to the logic required. The other was a capacitive netlist which estimates the capacitive loading at each node in the circuit. This is a very important simulation, because at the high speeds that HBT circuits are designed to run, the capacitance of the wires becomes a vital factor in the performance of the circuits. In the design of the analog circuits, the opamp, comparator and the Sigma-Delta modulator, the capacitive netlist is the one that comprehensively tests the circuits. 6.1 HBT Models The models for the HBT transistors and diodes were obtained from Rockwell. These models were used in the Hspice files for simulating the circuits. *** model parameters for HBT .model NPN2 npn +bf=235 br=1 re=14 +tf=2.5ps +vjc=1.4v +ise=1.2e-16 +mje=0.5 tr=335ps is=.7e-25 ne=2 mjc=0.33 cje=7ff nf=1 eg=1.52 rb=90 vj e=1.4 nc=2 xti=3.8 rc=51 cjc=10.3ff isc=4e-14 xtb=0.7 |
