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TitleDateType
1 Avalanche: A communication and memory architecture for scalable parallel computing1995Text
2 Cache-rings for memory efficient isosurface construction1997Text
3 CMOS programmable analog memory-cell array using floating-gate circuits2001-01Text
4 Formally specifying memory consistency models and automatically generating executable specifications2001Text
5 Message passing support in the Avalanche widget1996Text
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