Fred: an architecture for a self-timed decoupled computer

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Publication Type Journal Article
School or College College of Engineering
Department Computing, School of
Creator Brunvand, Erik L.
Other Author Richardson, William
Title Fred: an architecture for a self-timed decoupled computer
Date 1996
Description Decoupled computer architectures provide an effective means of exploiting instruction level parallelism. Selftimed micropipeline systems are inherently decoupled due to the elastic nature of the basic FIFO structure, and may be ideally suited for constructing decoupled computer architectures. Fred is a self-timed decoupled, pipelined computer architecture based on micropipelines. We present the architecture of Fred, with specific details on a micropipelined implementation that includes support for multiple functional units and out-of-order instruction completion due to the self-timed decoupling.
Type Text
Publisher Institute of Electrical and Electronics Engineers (IEEE)
Language eng
Bibliographic Citation Richardson, W., & Brunvand, E. L. (1996). Fred: an architecture for a self-timed decoupled computer. International Conference on Advanced Research in Asynchronous Circuits and Systems (Async96). March.
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Rights Management (c) 1996 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Format Medium application/pdf
Format Extent 87,911 bytes
Identifier ir-main,15749
ARK ark:/87278/s68d0dwr
Setname ir_uspace
Date Created 2012-06-13
Date Modified 2015-04-24
ID 707069
Reference URL https://collections.lib.utah.edu/ark:/87278/s68d0dwr
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