Integrating adaptive on-chip storage structures for reduced dynamic power

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Publication Type Journal Article
School or College College of Engineering
Department Computing, School of
Creator Balasubramonian, Rajeev
Other Author Dropsho, Steve; Buyuktosunoglu, Alper; Albonesi, David H.; Dwarkadas, Sandhya; Semeraro, Greg; Magklis, Grigorios; Scott, Michael L.
Title Integrating adaptive on-chip storage structures for reduced dynamic power
Date 2002
Description Energy efficiency in microarchitectures has become a necessity. Significant dynamic energy savings can be realized for adaptive storage structures such as caches, issue queues, and register files by disabling unnecessary storage resources. Prior studies have analyzed individual structures and their control. A common theme to these studies is exploration of the configuration space and use of system IPC as feedback to guide reconfiguration. However, when multiple structures adapt in concert, the number of possible configurations increases dramatically, and assigning causal effects to IPC change becomes problematic. To overcome this issue, we introduce designs that are reconfigured solely on local behavior. We introduce a novel cache design that permits direct calculation of efficient configurations. For buffer and queue structures, limited histogramming permits precise resizing control. When applying these techniques we show energy savings of up to 70% on the individual structures, and savings averaging 30% overall for the portion of energy attributed to these structures with an average of 2.1% performance degradation.
Type Text
Publisher Institute of Electrical and Electronics Engineers (IEEE)
First Page 141
Last Page 152
DOI 10.1109/PACT.2002.1106013
Subject Microarchitecture
Subject LCSH Microprocessors; Computer architecture; Cache memory; Buffer storage (Computer science); Microprocessors -- Energy consumption
Language eng
Conference Title 2002 International Conference on Parallel Architectures and Compilation Techniques. PACT 2002; 22-25 Sept. 2002; Charlottesville, VA, USA
Bibliographic Citation Dropsho, S., Buyuktosunoglu, A., Balasubramonian, R., Albonesi, D., Dwarkadas, S., Semeraro, G., Magklis, G., & Scott, M. L. (2002). Integrating adaptive on-chip storage structures for reduced dynamic power. 11th International Conference on Parallel Architectures and Compilation Techniques (PACT) , Charlottesville, September 2002, 141-152.
Rights Management (c) 2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. http://dx.doi.org/10.1109/PACT.2002.1106013
Format Medium application/pdf
Format Extent 265,235 bytes
Identifier ir-main,11504
ARK ark:/87278/s69g655q
Setname ir_uspace
Date Created 2012-06-13
Date Modified 2012-06-13
ID 704913
Reference URL https://collections.lib.utah.edu/ark:/87278/s69g655q
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