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Publication Type	technical report
School or College	College of Engineering
Department	Computing, School of
Creator	Hutchings, Brad Leon
Title	A cell-based approach to hierarchical interdomain VLSI design
Date	1992-06
Description	This dissertation presents a new design environment for VLSI circuits that is based upon a unification of the physical and structural design domains. Unlike conventional design approaches that divide the VLSI design process into disjoint structural and physical design phases, this new environment is based upon a unified design representation that supports simultaneous manipulation and inspection of physical and structural design features from within a single design view. This unified design representation combines cell-matrix design methodology with structural design techniques and achieves a representational commonalty between the structural and physical design domains. This representational commonality supports structural, physical, and mixed structural-physical design within a single design environment and with a single style of interaction. Structural and physical attributes can be attached to individual design components and the designer is always free to intermix physical and structural design techniques within the same design and within the same design view. This unified design approach is useful for general-purpose VLSI circuit designs but is especially well suited to the design of high speed and analog circuits. High speed and analog circuits, classes of circuits that are impossible to design using purely structural of physical design techniques alone, are much better facilitated by the unified design approach because the designer can combine both physical and structural design techniques throughout all phases of the design process. This research work also provides a new perspective on interactions between physical and structural design tools and shows how structural design techniques are useful for physical design and vice versa.
Type	Text
Publisher	University of Utah
Language	eng
Format Medium	application/pdf
Format Extent	4,712,468 bytes
File Name	Hutchings-A_Cell_Based.pdf
ARK	ark:/87278/s6sr11qf
Setname	ir_computersa
ID	107532
Reference URL	https://collections.lib.utah.edu/ark:/87278/s6sr11qf

Page Metadata

Title	Page 131
Setname	ir_computersa
ID	107509
OCR Text	Show DPullRight deletes columns in the DynArrayRow (from left to right). DPushLeft adds columns to the DynArrayRow (from right to left). DPushRight adds columns to the DynArrayRow (from left to right). DAssignElt assigns an element to the specified location in the DynArrayRow. DFindElt retrieves the element stored at the specified location in the DynArrayRow. DGetEltsWithinBounds retrieves all elements stored between the specified boimds in the DynArrayRow. DClone creates a deep copy of the DynArrayRow. A.2 The CellMatrix and the CellTree The CellMatrix is based upon the DynArray and the CellTree. The DynArray supports the array-like semantics of the CellMatrix and the CellTree serves as the implementation of the DynArrayRow. The CellTree is a binary-tree data structure that, for nommit cells, is more efficient than a simple linear array since it guarantees that a cell pointer to any contiguous cell, no matter how wide (in unit-cell terms), is stored only once in the CellTree. For cells with noncontiguous components, e.g., holes, the cell pointer would be stored once for each of the noncontiguous components. Compared to the ALU cell example above, each row of the array would contain only one pointer to the ALU cell for a total of 25 ALU cell pointers as compared to 625 in the simple array implementation. Semantically, a CellTree is similar to a one-dimensional array (the DynArrayRow explained above). A CellTree is a binary tree and consists of split-nodes and leaf nodes. A split-node indicates a boundary between two different cells in a given row (empty locations in the CellTree are represented by the "nullcell" ). Each leaf node represents a contiguous block in the row and contains a pointer to the cell that resides in that block. Figure A.2 depicts an example of a row and its representative CellTree. The row shown in the bottom of the figure contains four cells and six locations. The four cells are labeled A, B, C and D. Cell A is a unit-sized cell located at row position one, B is a nonunit cell 114
Reference URL	https://collections.lib.utah.edu/ark:/87278/s6sr11qf/107509