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Show CHAPTER 10 INTERFERENCE-GRAPH COLORING This portion of the allocator assigns specific machine locations to the vregs. By this point, all vregs have either been assigned to a specific Dreg or Areg through parameter use, or to one of the three location types. Those allocated only to a type must now be given a specific physical location of that type. To do this, interference graphs (see Section 3.2) are built for each type and then colored. Put simply, this amounts to assigning vregs that are simultaneously I ive during execution to the different locations. Normally, a coloring algorithm must be combined with a scheme for moving values to and from register space, referred to as spi //-code, made necessary when the number of interfering vregs exceeds the available space. We have found, though, that most programs and particularly LISP functions (which are typically short) do not produce interference graphs with nodes of high degree. Given this fact and the experimental nature of this allocator, spill code generation is not included in this thesis. This is equivalent to granting the assumption that node interference degree will never exceed the number of available Dregs (eight) or Aregs (seven). With the degree assumption granted, coloring becomes trivial. Interference data are maintained as a list under the i ntf r attribute of each vreg item. Each list contains all vregs whose lifetimes interfere with that of the subject vreg. Each vreg item also has a location attribute which is filled when the vreg is assigned a physical location. To pick a final location for a vreg assigned only to a type, the locations of all its interfering vregs are collected in a list. The set of machine registers of the assigned type are checked against this |
