Publication Type |
Journal Article |
School or College |
College of Engineering |
Department |
Computing, School of |
Creator |
Balasubramonian, Rajeev |
Other Author |
Dwarkadas, Sandhya; Albonesi, David H. |
Title |
Dynamically allocating processor resources between nearby and distant ILP |
Date |
2001 |
Description |
Modern superscalar processors use wide instruction issue widths and out-of-order execution in order to increase instruction-level parallelism (ILP). Because instructions must be committed in order so as to guarantee precise exceptions, increasing ILP implies increasing the sizes of structures such as the register file, issue queue, and reorder buffer. Simultaneously, cycle time constraints limit the sizes of these structures, resulting in conflicting design requirements. In this paper, we present a novel microarchitecture designed to overcome the limitations of a register file size dictated by cycle time constraints. Available registers are dynamically allocated between the primary program thread and a future thread. The future thread executes instructions when the primary thread is limited by resource availability. The future thread is not constrained by in-order commit requirements. It is therefore able to examine a much larger instruction window and jump far ahead to execute ready instructions. Results are communicated back to the primary thread by warming up the register file, instruction cache, data cache, and instruction reuse buffer, and by resolving branch mispredicts early. The proposed microarchitecture is able to get an overall speedup of 1.17 over the base processor for our benchmark set, with speedups of up to 1.64. |
Type |
Text |
Publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
First Page |
26 |
Last Page |
37 |
DOI |
10.1109/ISCA.2001.937428 |
Subject |
Instruction-level parallelism; Microarchitecture; Primary thread; Future thread; Instruction reuse buffer |
Subject LCSH |
Microprocessors; Computer architecture; Microprocessors -- Energy consumption |
Language |
eng |
Conference Title |
28th Annual International Symposium on Computer Architecture; 30 June-4 July 2001; Goteborg, Sweden |
Bibliographic Citation |
Balasubramonian, R., Dwarkadas, S., & Albonesi, D. H. (2001). Dynamically allocating processor resources between nearby and distant ILP. Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA, 26-37. |
Rights Management |
(c) 2001 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. http://dx.doi.org/10.1109/ISCA.2001.937428 |
Format Medium |
application/pdf |
Format Extent |
216,618 bytes |
Identifier |
ir-main,11485 |
ARK |
ark:/87278/s6nz8s69 |
Setname |
ir_uspace |
ID |
706415 |
Reference URL |
https://collections.lib.utah.edu/ark:/87278/s6nz8s69 |