Resource allocation in an experimental LISP compiler

This thesis describes the design and implementation of a register allocation system for EPIC, an experimental LISP compiler. EPIC follows the Portable Standard LISP (PSL) philosophy of retargetability and parameter-passing through registers. Like many register allocators, this system accepts linear code containing virtual registers and maps these "vregs" into machine registers, memory and stack. Unlike other allocators, this allocator works within a highly constrained environment, in which most vegs are restricted to one or more physical Iocations by the way they are used. The allocator is concerned primarily with resolving conflicting location constraints. Location constraints include: protocol--parameters must be in specific registers, volatility--five values must be saved in memory during function calls; and instructional--reflecting addressing-modes of the target machine. Resolution of conflicting constraints is done through instruction-graph partitioning and subsequent introduction of new vregs. This technique has proven to be inefficient, and the reasons are discussed. A cursory description of a better algorithm, which has been implemented, is included. Two linear-code transformations are also discussed: the first involing removal of "spill" type code; the second, a three-to-two address format transformation.