Publication Type |
Journal Article |
School or College |
College of Engineering |
Department |
Computing, School of |
Creator |
Gopalakrishnan, Ganesh |
Other Author |
Nalumansu, Ratan |
Title |
A partial order reduction algorithm without the Proviso |
Date |
1998 |
Description |
This paper presents a partial order reduction algorithm, called Two phase, that preserves stutter free LTL properties. Two phase dramatically reduces the number of states visited compared to previous partial order reduction algorithms on most practical protocols. The reason can be traced to a step of the previous algorithms, called the proviso step, that specifies a condition on how a state that closes a loop is expanded. Two phase can be easily combined with an on-the-fly model-checking algorithm to reduce the memory requirements further. Furthermore a simple but powerful selective-caching scheme can also be added to Two phase. Two phase has been implemented in a model-checker called PV (Protocol Verifier) and is in routine use on large problems. |
Type |
Text |
Publisher |
University of Utah |
First Page |
98 |
Last Page |
17 |
Subject |
Order reduction algorithm; Proviso step |
Language |
eng |
Bibliographic Citation |
Nalumansu, R., & Gopalakrishnan, G. (1998). A partial order reduction algorithm without the Proviso. UUCS-98-017. |
Series |
University of Utah Computer Science Technical Report |
Relation is Part of |
ARPANET |
Rights Management |
©University of Utah |
Format Medium |
application/pdf |
Format Extent |
4,175,341 bytes |
Identifier |
ir-main,15920 |
ARK |
ark:/87278/s6k93rm6 |
Setname |
ir_uspace |
ID |
702529 |
Reference URL |
https://collections.lib.utah.edu/ark:/87278/s6k93rm6 |