Cascade: hardware for high/variable precision arithmetic

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Publication Type technical report
School or College College of Science
Department Computing, School of
Creator Carter, Tony M.
Other Author Cascade hardware; Precision arithmetic
Title Cascade: hardware for high/variable precision arithmetic
Date 1989
Description The Cascade hardware architecture for high/variable precision arithmetic is described. It uses a radix-16 redundant signed-digit number representation and directly supports single or multiple precision addition, subtraction, multiplication, division, extraction of the square root and computation of the greatest common divisor. It is object-oriented and implements an abstract class of objects, variable precision integers. It provides a complete suite of memory management functions implemented in hardware, including a garbage collector. The Cascade hardware permits free tradeoffs of space versus time.
Type Text
Publisher University of Utah
First Page 1
Last Page 12
Language eng
Bibliographic Citation Carter, T. M. (1989). Cascade: hardware for high/variable precision arithmetic. 1-12. UUCS-89-005.
Series University of Utah Computer Science Technical Report
Relation is Part of ARPANET
Rights Management ©University of Utah
Format Medium application/pdf
Format Extent 4,350,059 bytes
Identifier ir-main,16163
ARK ark:/87278/s6bz6qjd
Setname ir_uspace
ID 705749
Reference URL https://collections.lib.utah.edu/ark:/87278/s6bz6qjd