An O(n) time discrete relaxation architecture for real-time processing of the consistent labeling problem

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Publication Type technical report
School or College College of Engineering
Department Computing, School of
Creator Henderson, Thomas C.
Other Author Gu, Jun; Wang, Wei
Title An O(n) time discrete relaxation architecture for real-time processing of the consistent labeling problem
Date 1986
Description Discrete relaxation techniques have proven useful in solving a wide range of problems in digital signal and digital image processing, artificial intelligence, operations research, and machine vision. Much work has been devoted to finding efficient hardware architectures. This paper shows that a conventional hardware design for a Discrete Relaxation Algorithm (DRA) suffers from 0(n2m3 ) time complexity and Oinhn2) space complexity. By reformulating DRA into a parallel computational tree and using a multiple tree-root pipelining scheme, time complexity is reduced to O(nm), while the space complexity is reduced by a factor of 2. For certain relaxation processing, the space complexity can even be decreased to O(nm). Furthermore, a technique for dynamic configuring an architectural wavefront is used which leads to an O(n) time highly configurable DRA3 architecture.
Type Text
Publisher University of Utah
First Page 1
Last Page 53
Subject Discrete relaxation techniques
Language eng
Bibliographic Citation Gu, J., Wang, W., & Henderson, T. C. (1986). An O(n) time discrete relaxation architecture for real-time processing of the consistent labeling problem. 1-53. UUCS-TR-86-116.
Series University of Utah Computer Science Technical Report
Relation is Part of ARPANET
Rights Management ©University of Utah
Format Medium application/pdf
Format Extent 14,888,892 bytes
Identifier ir-main,16317
ARK ark:/87278/s6708jsn
Setname ir_uspace
Date Created 2012-06-13
Date Modified 2021-05-06
ID 704844
Reference URL https://collections.lib.utah.edu/ark:/87278/s6708jsn