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Creator | Title | Description | Subject | Date |
151 |
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Balasubramonian, Rajeev | Leveraging wire properties at the microarchitecture level | In future microprocessors, communication will emerge as a major bottleneck. The authors advocate composing future interconnects of some wires that minimize latency, some that maximize bandwidth, and some that minimize power. A microarchitecture aware of these wire characteristics can steer on-chip ... | Microarchitecture; Interconnects; Cache coherence | 2006-11 |
152 |
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Parker, Steven G.; Smith, Philip J.; Johnson, Christopher R. | Parallelization and integration of fire simulations in the Uintah PSE | A physics-based stand-alone serial code for fire simulations is integrated in a unified computational framework to couple with other disciplines and to achieve massively parallel computation. Uintah, the computational framework used, is a component-based visual problem-solving environment developed... | Uintah; Problem solving environment | 2001 |
153 |
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Hansen, Charles D.; Parker, Steven G.; Johnson, Christopher R. | Integrated problem solving environment: the SCIRun computational steering system | SCIRun is a scientific programming environment that allows the interactive construction, debugging, and steering of large-scale scientific computations. We review related systems and introduce a taxonomy that explores different computational steering solutions, Considering these approaches, we discu... | SCIRun; Computational steering; Problem solving environment; Distributed computing | 1998 |
154 |
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| Reconstruction of sculptured surface using coordinate measuring machines | This paper presents a strategy for reverse engineering that uses a coordinate measur ing machine to reconstruct three dimensional sculptured surfaces. A rough initial model of the surface is generated manually. An iterative method is then used to refine the surface model until the error is within a ... | Reconstruction; Sculptured surface; Coordinate measuring machines | 1993 |
155 |
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Riloff, Ellen M. | Toward completeness in concept extraction and classification | Many algorithms extract terms from text together with some kind of taxonomic classification (is-a) link. However, the general approaches used today, and specifically the methods of evaluating results, exhibit serious shortcomings. Harvesting without focusing on a specific conceptual area may deliv... | Concept extraction; Concept classification | 2009 |
156 |
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Riesenfeld, Richard F. | Computer aided geometric design | This book contains the edited proceedings of the first International Conference on Computer Aided Geometric Design, an important new field that draws on the principles of computer science, mathematics, and geometric design. The list of contributors includes most of the leading researchers in the... | Computer aided geometric design | 1973 |
157 |
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Zhang, Lixin | Design a DRAM backend for the impulse memory system | The Impulse Adaptable Memory System is a new memory system that exposes DRAM access patterns not seen in conventional memory systems. Impulse can generate huge number of small DRAM accesses, which will not be handled effectively by a conventional cache-line-size-access-oriented DRAM backend. In this... | DRAM; Backend; Impulse memory system; Impulse Adaptable Memory System; Access patterns | 2000 |
158 |
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Cohen, Elaine | Hybrid symbolic and numeric operators as tools for analysis of freeform surfaces | Freeform surfaces are commonly used in Computer Aided Geometric Design?? so accurate analysis of surface properties is becoming increasingly important In this paper we de ne surface slope and surface speed?? develop visualization tools?? and demonstrate that they can be useful in the design proc... | Freeform surfaces | 1992 |
159 |
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Cohen, Elaine | Constant scallop height tool path generation | An approach for the automatic generation of constant scallop height tool paths is presented. An example is shown generated from a B-spline model, although it can be used with many types of sculptured surfaces. The approach utilizes surface subdivision techniques and a new algorithm for tool path gen... | Scallop height; Tool path generation; B-spline model | 1989 |
160 |
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Brunvand, Erik L.; Carter, John | Impulse: building a smarter memory controller | Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through configurable physical address remapping. By remapping physical addresses, applications control how their data is ac... | | 1999 |
161 |
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Shirley, Peter S.; Parker, Steven G. | Towards interactive global illumination effects via sequential Monte Carlo adaptation | This paper presents a novel method that effectively combines both control variates and importance sampling in a sequential Monte Carlo context while handling general single-bounce global illumination effects. The radiance estimates computed during the rendering process are cached in an adaptive per... | Ray tracing; Illumination; Monte Carlo methods | 2008 |
162 |
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Swope, Steven M. | Simon II kernel reference manual | The principal objective of Simon II is to provide a flexible and adaptable framework for constructing simulators for a wide variety of parallel systems. A simulator consists of a set of software building blocks. Each building block, i.e. object, simulates a specific component of the parallel system... | Simon II; Kernels; Simulators; Parallel systems | 1986 |
163 |
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Balasubramonian, Rajeev | Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy | Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postulate a 3D chip design that stacks SRAM and DRAM upon processing cores and employs OS-based page coloring to minimize hori... | Multi-core processors; Cache and memory hierarchy; Non-uniform cache architecture (NUCA); Page coloring; On-chip networks; SRAM/DRAM cache reconfiguration | 2009-02 |
164 |
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Thomas, Spencer W. | Set operations on sculptured solids | A general method is presented for performing Boolean set operations on solids represented by a sculptured surface boundary model. The method is developed first for solids with closed boundary surfaces. It is then shown to apply also to "partially bounded" solids, which have incompletely specified b... | Set operations; Sculptured solids; Sculptured surface; Boundary model | 1987 |
165 |
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Freire, Juliana | ShreX: managing XML documents in relational databases | We describe ShreX, a freely-available system for shredding, loading and querying XML documents in relational databases. ShreX supports all mapping strategies proposed in the literature as well as strategies available in commercial RDBMSs. It provides generic (mapping-independent) functions for... | ShreX; XML Schema; Mapping strategies | 2004 |
166 |
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Hansen, Charles D.; Sloan, Peter-Pike J. | Parallel lumigraph reconstruction | This paper presents three techniques for reconstructing Lumigraphs/ Lightfields on commercial ccNUMA parallel distributed shared memory computers. The first method is a parallel extension of the software-based method proposed in the Lightfield paper. This expands the ray/two-plane intersection test ... | Lumigraph; Parallel reconstruction | 1999 |
167 |
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Susarla, Sai R.; Carter, John | Khazana: a flexible wide area data store | Khazana is a peer-to-peer data service that supports efficient sharing and aggressive caching of mutable data across the wide area while giving clients significant control over replica divergence. Previous work on wide-area replicated services focussed on at most two of the following three proper... | Khazana; Peer-to-peer data service | 2003-10-13 |
168 |
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Hansen, Charles D. | Visualization of intricate flow structures for vortex breakdown analysis | Vortex breakdowns and flow recirculation are essential phenomena in aeronautics where they appear as a limiting factor in the design of modern aircrafts. Because of the inherent intricacy of these features, standard flow visualization techniques typically yield cluttered depictions. The paper addre... | | 2004 |
169 |
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Balasubramonian, Rajeev | Dynamically tunable memory hierarchy | The widespread use of repeaters in long wires creates the possibility of dynamically sizing regular on-chip structures. We present a tunable cache and translation lookaside buffer (TLB) hierarchy that leverages repeater insertion to dynamically trade off size for speed and power consumption on a per... | Microarchitecture; High performance microprocessors; Reconfigurable architectures; Energy and performance of on-chip caches; Translation lookaside buffer (TLB); Tunable cache | 2003-10 |
170 |
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Riloff, Ellen M. | Automatically generating extraction patterns from untagged text | Many corpus-based natural language processing systems rely on text corpora that have been manually annotated with syntactic or semantic tags. In particular, all previous dictionary construction systems for information extraction have used an annotated training corpus or some form of annotated input... | Information extraction; Automatically generating; Extraction patterns; Untagged text; Corpus-based; AutoSlog-TS; AutoSlog system; MUC-4; Dictionary construction | 1996 |
171 |
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Subrahmanyam, P.A. | An algebraic formulation of seitz's weak conditions for self timed circuits | Two fairly intuitive conditions are given that serve to algebraically characterize Seitz's "weak conditions" for self timed circuits. It is shown that these two conditions embody the 12 temporal logic conditions (developed b y Owicki and Malachi) which are intended to express both the weak condition... | Seitz's weak conditions; Self-timed circuits | 1982 |
172 |
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Balasubramonian, Rajeev | Power-efficient approaches to reliability | Radiation-induced soft errors (transient faults) in computer systems have increased significantly over the last few years and are expected to increase even more as we move towards smaller transistor sizes and lower supply voltages. Fault detection and recovery can be achieved through redundancy. St... | Radiation-induced; Soft errors; Transient faults; Redundant thread; Trailing thread; Power consumption | 2005 |
173 |
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Hansen, Charles D.; Wald, Ingo | Interactive isosurface ray tracing of time-varying tetrahedral volumes | Abstract- We describe a system for interactively rendering isosurfaces of tetrahedral finite-element scalar fields using coherent ray tracing techniques on the CPU. By employing state-of-the art methods in polygonal ray tracing, namely aggressive packet/frustum traversal of a bounding volume hierarc... | | 2007-11 |
174 |
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Brunvand, Erik L. | Practical advances in asynchronous design and in asynchronous/synchronous interfaces | Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practical asynchronous circuit and system design in four areas: controllers, datapaths, processors, and the design of asynchr... | | 1999 |
175 |
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Soares, Marshall A. | SOAR user's manual | Abstract: The development of simulation and test stimulus and checking of circuits with that stimulus is the source or many circuit bugs. The SOAR conversion package is a C library that generates the stimuli for gate-level simulation, circuit simulation and integrated circuit test The conversion pa... | SOAR; Conversion package; C library; Simulation | 1997 |