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CreatorTitleDescriptionSubjectDate
326 Jacobson, HansRealizing burstmode circuits via STG speed independent synthesisThis report discusses the similarities and differences of STG and Burstmode specifications and synthesis methods. The first part of the report examines the applicability and efficiency of STG's single controller fork-join concurrency ability versus Burstmode's partitioned fork-join concurrency appr...Burstmode circuits; STG1997
327 Bruderlin, BeatConstraint objects ? integrating constraint definition and graphical interactionThis paper describes the implementation of a new constraint??based tech?? nique for direct manipulation in interactive CAD which will simplify the design process especially in the early stages We introduce so called Constraint Objects and Parameter Objects which constitute an object??oriented ...Constraint objects1992
328 Balasubramonian, RajeevDynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large cachesIn future multi-cores, large amounts of delay and power will be spent accessing data in large L2/L3 caches. It has been recently shown that OS-based page coloring allows a non-uniform cache architecture (NUCA) to provide low latencies and not be hindered by complex data search mechanisms. In this ...Page coloring; Shadow-memory addresses; Cache capacity allocation; Data/page migration; Last level caches; Non-uniform cache architectures (NUCA)2009-02
329 Sobh, Tarek M.; Henderson, Thomas C.Robotic prototyping environment (Progress report)Prototyping is an important activity in engineering. Prototype development is a good test for checking the viability of a proposed system. Prototypes can also help in determining system parameters, ranges, or in designing better systems. The interaction between several modules (e.g., S/W, VLSI, CAD,...Prototyping; Prototyping environment; Robotic prototyping1994
330 Gopalakrishnan, GaneshTowards a verification technique for large synchronous circuitsWe present a symbolic simulation based veri cation approach which can be applied to large synchronous circuits A new technique to encode the state and input constraints as parametric Boolean expressions over the state and input variables is used to make our symbolic simulation based veri cation...symbolic simulation; verification1992
331 Freire, Juliana; Silva, Claudio T.Querying and creating visualizations by analogyWhile there have been advances in visualization systems, particularly in multi-view visualizations and visual exploration, the process of building visualizations remains a major bottleneck in data exploration. We show that provenance metadata collected during the creation of pipelines can be reused ...Provenance; VisTrails; Pipelines; Query-by-example2007-11
332 Lindstrom, Gary E.Combinator evaluation of functional programs with logical variablesA technique is presented that brings logical variables into the scope of the well known Turner method for evaluating normal order functioned programs by S, K, I combinator graph reduction. This extension is illustrated by SASL+LV, an extension of Turner's language SASL in which general expressions s...Functional programs; Logical variables; SASL+LV; Turner's language1987
333 Riloff, Ellen M.Recognizing and organizing opinions expressed in the world pressTomorrow's question answering systems will need to have the ability to process information about beliefs, opinions, and evaluations-the perspective of an agent. Answers to many simple factual questions-even yes/no questions-are affected by the perspective of the information source. For example...Opinions; Opinion recognition; World press; MPQA project; Multiple perspectives2003
334 Greer, William HarveyMonaural sensitivity to dispersion in impulses and speechMonaural sensitivity; Dispersion; Impulses; Speech1975
335 Smith, Kent F.PPL design examples (NMOS30 Version)This work was supported in part by Defense Advanced Research Projects Agency under Contract number DAAK1184K0017. All opinions, findings, conclusions or recommendations expressed in this document are those of the author(s) and do not necessarily reflect the views of DARPA.Circuits; Design1986
336 Gopalakrishnan, GaneshhopCP: A concurrent hardware description languagehopCP is a language for the specification, simulation, and synthesis of hardware systems. hopCP captures the behavior of a hardware system by specifying the causal relationships between actions that the system can perform. No specific timing discipline is implied by a hopCP specification. Hence, hop...hopCP; Hardware systems1991
337 Evans, DavidGraphical man/machine communications: December 1971Semi-Annual Technical Report for period 1 June 1971 to 31 December 1971. This document includes a summary of research activities and facilities at the University of Utah under Contract F30602-70-C-0300. Information conveys important research milestones attained during this period by each of the f...Man/machine communications; Computing systems; Digital waveform processing1971-12
338 Henderson, Thomas C.; Cohen, ElaineInnate theories as a basis for autonomous mental developmentSloman (in robotics), Chomsky and Pinker (in natural language), and others, e.g., Rosenberg (in human cooperative behavior) have proposed that some abstract theories relevant to cognitive activity are encoded genetically in humans. The biological advantages of this are (1) to reduce the learning ...Autonomous mental development2009
339 Archuleta, MichaelHidden surface line drawing algorithmThis paper describes a fast procedure in processing hidden surface pictures with the output in vector form. The program has been written expressly for a Decsystem 10 and has performed successfully on three different installations. The algorithm which is being used is a modification to the Watkins' A...Watkins algorithm; Hidden surface1972
340 Richardson, William F.; Brunvand, Erik L.The NSR processor prototypeThe NSR Non Synchronous RISC processor is a general purpose processor structured as a collection of self timed units that operate concurrently and communicate over bundled data channels in the style of micropipelines?? These units correspond to standard synchronous pipeline stages such as Instr...Self-timed Systems; Asynchronous systems; Micropipelines; FPGAs; RISC processor1992
341 Orr, Douglas B.; Mecklenburg, RobertOMOS ? An object server for program executionThe benefits of object-oriented programming are well known but popular operating systems provide very few object oriented features to users and few are im plemented using object oriented techniques themselves In this paper we discuss a mechanism for apply ing object oriented programming co...OMOS; Object server1992
342 Henderson, Thomas C.High-level planning for dextrous manipulationThe development of mechanical end effectors capable of dextrous manipulation is a rapidly growing and quite successful field of research. It has in some sense put the focus on control issues, in particular, how to control these remarkably anthropomorphic manipulators to perform the deft movement tha...Mechanical end effectors; Dextrous manipulation1987
343 Henderson, Thomas C.UPE: Utah prototyping environment for robot manipulatorsDeveloping an environment that enables optimal and flexible design of robot manipulators using reconfigurable links, joints, actuators, and sensors is an essential step for efficient robot design and prototyping. Such an environment should have the right "mix" of software and hardware components fo...prototyping environment; robot manipulators1994
344 Boll, Steven F.Application of the saber method for improved spectral analysis of noisy speechA stand alone noise suppression algorithm is described for reducing the spectral effects of acoustically added noise in speech. A fundamental result is developed which shows that the spectral magnitude of speech plus noise can be effectively approximated as the sum of magnitudes of speech and noise....Noise suppression algorithm; SABER method1977
345 Gu, JunAn optimal, parallel discrete relaxation algorithm and architecture (Revised January 1988 and August 1989)A variety of problems in artificial intelligence, operations research, symbolic logic, pattern recognition and computer vision, and robot manipulation are special cases of the Consistent Labeling Problem (CLP). The Discrete Relaxation Algorithm (DRA) is an efficient computational technique to enfor...Consistent Labeling Problem; CLP; Discrete Relaxation Algorithm; DRA1988
346 Riloff, Ellen M.Inducing information extraction systems for new languages via cross-language projectionInformation extraction (IE) systems are costly to build because they require development texts, parsing tools, and specialized dictionaries for each application domain and each natural language that needs to be processed. We present a novel method for rapidly creating IE systems for new languages by...Information extraction; IE systems; Cross-language projection; English; French2002
347 Keller, Robert M.Sentinels: A concept for multiprocess coordinationThe sentinel construct is introduced, which provides a certain syntactic and semantic framework for multiprocess coordination. The advantage of this construct over others is argued to be semantic transparency, efficiency, ease in implementation, and usefulness in verfication.Sentinels; Multiprocess coordination; Sentinel construct1978
348 Lindstrom, Gary E.Layered, server-based support for Object-Oriented application developmentThis paper advocates the idea that the physical modularity (file structure) of application components supported by conventional OS environments can be elevated to the level of logical modularity, which in turn can directly support application development in an object-oriented manner. We demonstrate ...Object-Oriented application development1995
349 Hibler, Michael J.Notes on thread models in Mach 3.0During the Mach In-Kernel Servers work, we explored two alternate thread models that could be used to support traps to in-kernel servers. In the "migrating threads" model we used, the client's thread temporarily moves into the server's task for the duration of the call. In t h e "thread switching" ...Thread models; In-kernel servers; Thread switching; Mach 3.01993
350 Balasubramonian, RajeevCommit algorithms for scalable hardware transactional memoryIn a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. For a large-scale distributed memory system, we propose novel algorithms to implement commit that are deadlock- and livelock-free and do not empl...Commit algorithms; Scalable; Hardware; Transactional memory2007
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