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Creator | Title | Description | Subject | Date |
226 |
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Bruderlin, Beat | Interaction with constraints in 3D modeling | Interactive geometric modeling is an important part of the industrial product design process. This paper describes how constraints can be used to facilitate the interactive definition of geometric objects and assemblies. We have implemented a geometric modeling system that combines the definition o... | Interactive geometric modeling; Industrial product design; Geometric constraints | 1990 |
227 |
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Elens, Robert N. | Sequencing computational events in heterogeneous distributed systems | Distributed systems are growing in number, size, and complexity. Some technological advances have been made to program these systems, most notably the remote procedure call. However, the nature of heterogeneous distributed systems allows for much more complex interactions and new programming techno... | Sequencing; Computational events; Heterogeneous distributed systems | 1990 |
228 |
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Bruderlin, Beat | Detecting ambiguities: an optimistic approach to robustness problems in computational geometry | Computational geometry algorithms deal with geometric objects, usually represented by coordinates in an n-dimensional Euclidean space. Most efficient algorithms implement geometric operations as floating point arithmetic operations on the coordinates. Since floating point numbers can only approxima... | Ambiguities; Computational geometry; Robustness problems | 1990 |
229 |
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Kessler, Robert R. | Concurrent Scheme | This paper describes an evolution of the Scheme language to support parallelism with tight coupling of control and data. Mechanisms are presented to address the difficult and related problems of mutual exclusion and data sharing which arise in concurrent language systems. The mechanisms are tailored... | Concurrent Scheme; Parallelism | 1990 |
230 |
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Gopalakrishnan, Ganesh | Some recent asynchronous system design methodologies | We present an in-depth study of some techniques for asynchronous system design, analysis, and verification. After defining basic terminology, we take one simple example - a four-phase t o two-phase converter - and present its design using (a) classical flow-tables; (b) Signal Transition Graphs of [... | Asynchronous system design | 1990 |
231 |
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Henderson, Thomas C. | Zo: A framework for autonomous agent behavior specification and analysis | We describe a framework for the specification and analysis of autonomous agents1 . In general, such agents require several levels of behavioral specifications, including: low-level reflex actions, mid-level controllers to deal with the physical aspects of the world, and highlevel representations for... | Z-Infinity; Autonomous agents; Behavior | 1990 |
232 |
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Kessler, Robert R. | DPOS: A metalanguage and programming environment for parallel processors | The complexity and diversity of parallel programming languages and computer architectures hinders programmers in developing programs and greatly limits program portability. All MIMD parallel programming systems, however, address common requirements for process creation, process management, and inte... | DPOS; MIMD parallel programming | 1990 |
233 |
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Bruderlin, Beat | DI - An object-oriented user interface toolbox for modula-2 applications | The DI dialog interface tool library for Modula-2 applications described in this paper facilitates the design and implementation of graphical, object-oriented user interfaces for workstations with a graphical screen, a mouse and a keyboard. Much emphasis is put on the portability of the application... | DI dialog interface tool | 1990 |
234 |
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George, Lal | A scheduling strategy for shared memory multiprocessors | An efficient scheduling strategy for shared memory multiprocessors is described. The rapid dissemination of tasks to available procesors and ready queues is crucial to the performance of any parallel system. Such overheads determine the attainable speedup and performance of the system. Poor techniq... | Shared memory multiprocessors | 1990 |
235 |
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Starkey, Mike | C-RISC A C language reduced instruction set computer | This project is the implementation of a Reduced Instruction Set Computer (RISC) on a tiny chip. RISC technology is based on the idea that a small number of simple instructions can be used to create a fast, flexible computer. Our RISC uses this principle while staying within the confines of the tiny ... | RISC; C language | 1990 |
236 |
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Evans, John | DPOS programming manual | This manual describes the basic concepts of the DPOS Metalanguage and the programming language DPOS Scheme. | DPOS; Programming manual | 1990 |
237 |
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Michell, Nick | On the potential of asynchronous pipelined processors | An asynchronous version of the pipelined R3000 and DLX processors, the A3000, is being designed. Simulation was employed t o investigate the potential speed-up obtainable due t o the asynchronous operation. Preliminary results show up to a 64% improvement in performance. | Pipelined processors; Pipelined R3000; DLX processors; A3000 | 1990 |
238 |
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Henderson, Thomas C. | CBCV: A CAD-based vision system | The CBCV system has been developed in order to provide the capability of automatically synthesizing executable vision modules for various functions like object recognition, pose determinaion, quality inspection, etc. A wide range of tools exist for both 2D and 3D vision, including not only software... | CBCV | 1990 |
239 |
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Bruderlin, Beat | An axiomatic approach for solving geometric problems symbolically | This paper describes a new approach for solving geometric constraint problems and problems in geometry theorem proving. We developed a rewrite-rule mechanism operating on geometric predicates. Termination and completeness of the problem solving algorithm can be obtained through well foundedness and ... | Geometric constraint problems; Geometry theorem proving; Knuth-Bendix completion algorithm | 1990 |
240 |
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Gopalakrishnan, Ganesh | Design and verification of the rollback chip using HOP: a case study of formal methods applied to hardware design | The use of formal methods in hardware design improves the quality of designs in many ways: it promotes better understanding of the design; it permits systematic design refinement through the discovery of invariants; and it allows design verification (informal or formal). In this paper we illustrate ... | Rollback chip; Verification; HOP; Hardware design; RBC | 1990 |
241 |
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Bruderlin, Beat | Robust regularized set operations on polyhedra | This paper describes a provably correct and robust implementation of regularized set operations on polyhedral objects. Although the algorithm described here does not assume manifold polyhedra and handles all possible degenerate cases, it turns out to be quite simple. The geometric operations and rel... | Robust regularized set operations | 1990 |
242 |
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Gopalakrishnan, Ganesh | Efficient symbolic simulation based verification using the parametric form of boolean expressions (rev.) | We present several new techniques to make symbolic simulation based verification efficient. These techniques hinge on the use of the parametric form of a boolean expression (e.g. the parametric form for the boolean expression XQ V -<xi is the equivalent expression 3a b . (XQ = a V 6) A (xi = b), whe... | Symbolic simulation; Verification | 1991 |
243 |
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Starkey, Mike | Switchbox routing by pattern matching | Many good algorithms have been designed that provide good solutions to the wire routing problem in VLSI. Unfortunately, many of these algorithms only consider a small subset of different parameters such as number of layers, routability of layers and technology. We believe that these algorithms can b... | Switchbox routing; pattern matching; wire routing problem; VLSI | 1991 |
244 |
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Gopalakrishnan, Ganesh | Static analysis techniques for the synthesis of efficient asynchronous circuits | In the context of deriving asynchronous circuits from high-level descriptions, determining whether two actions are potentially concurrent (overlapped execution) or serial (non-overlapped execution) has several advantages. This knowledge can be utilized to efficiently implement shared variables, sup... | Static analysis; Synthesis | 1991 |
245 |
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Lindstrom, Gary E. | Using a functional language and graph reduction to program multiprocessor machines or functional control of imperative programs | This paper describes an effective means for programming shared memory multiprocessors whereby a set of sequential activities are linked together for execution in parallel. The glue for this linkage is provided by a functional language implemented via graph reduction and demand evaluation. The full ... | shared memory multiprocessors; Programming; functional language; graph reduction; Demand evaluation | 1991 |
246 |
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Gopalakrishnan, Ganesh | hopCP: A concurrent hardware description language | hopCP is a language for the specification, simulation, and synthesis of hardware systems. hopCP captures the behavior of a hardware system by specifying the causal relationships between actions that the system can perform. No specific timing discipline is implied by a hopCP specification. Hence, hop... | hopCP; Hardware systems | 1991 |
247 |
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Gopalakrishnan, Ganesh | From process-oriented functional specifications to efficient asynchronous circuits | A methodology for high-level synthesis and performance optimization of asynchronous circuits is described. A specification language called hopCP which is based on a simple extension to classical flow graphs is introduced. The extension involves the addition of expression actions to a flow graph, to ... | Synthesis; Performance optimization | 1991 |
248 |
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Gopalakrishnan, Ganesh | Hierarchical action refinement: a methodology for compiling asynchronous circuits from a concurrent HDL | A hardware specification formalism called hopCP is introduced, hopCP provides an uniform notation t o describe the causal relationships between a set of nonatomic actions which capture the computational, concurrency, control and communication aspects of hardware behavior. A systematic approach to sy... | Hierarchical action refinement; Hardware specification formalism; hopCP | 1991 |
249 |
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Henderson, Thomas C. | Parallel path consistency | Filtering algorithms are well accepted as a means of speeding up the solution of the consistent labeling problem (CLP). Despite the fact that path consistency does a better job of filtering than arc consistency, AC is still the preferred technique because it has a much lower time complexity. We ar... | Filtering algorithms; Parallel paths; Consistency; Consistent labeling problem; CLP | 1991 |
250 |
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Cohen, Elaine | Error bounded variable distance offset operator for free from curves and surfaces | Most offset approximation algorithms for freeform curves and surfaces may be classified into two main groups. The first approximates the curve using simple primitives such as piecewise arcs and lines and then calculates the (exact) offset operator to this approximation. The second offsets the contro... | Error bounded; Freeform curves | 1991 |