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Creator | Title | Description | Subject | Date |
| 226 |
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Seror, Denis D. | D.C.P.L. - A distributed control programming language | In this thesis, a computation is considered a system of asynchronously cooperating "independent" programs (coroutines) linked by paths of in formation along which messages are sent. A programming language called DCPL, a Distributed Control Programming Language, in which such computations may be ex... | Distributed control programming language; DCPL | 1970 |
| 227 |
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Berzins, Martin | DAG-based software frameworks for PDEs | The task-based approach to software and parallelism is well-known and has been proposed as a potential candidate, named the silver model, for exas-cale software. This approach is not yet widely used in the large-scale multi-core parallel computing of complex systems of partial differential equations... | | 2012-01-01 |
| 228 |
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Berzins, Martin | Data and range-bounded polynomials in ENO methods | Essentially Non-Oscillatory (ENO) methods and Weighted Essentially Non- Oscillatory (WENO) methods are of fundamental importance in the numerical solution of hyperbolic equations. A key property of such equations is that the solution must remain positive or lie between bounds. A modification of the ... | | 2012-01-01 |
| 229 |
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Hansen, Charles D. | Data distributed, parallel algorithm for ray-traced volume rendering | This paper presents a divide-and-conquer ray-traced volume rendering algorithm and a parallel image compositing method, along with their implementation and performance on the connection Machine CM-5, and networked workstations. This algorithm distributes both the data and the computations to individ... | Volume rendering; Ray tracing; ; Computer algorithms; Scientific visualization; Network computing; Massively parallel processing | 1993 |
| 230 |
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Hansen, Charles D. | Data distributed, parallel algorithm for ray-traced volume rendering | This paper presents a divide-and-conquer ray-traced volume rendering algorithm and a parallel image compositing method, along with their implementation and performance on the Connection Machine CM-5, and networked workstations. This algorithm distributes both the data and the computations to individ... | Volume rendering; Ray tracing; ; Computer algorithms; Scientific visualization; Network computing; Massively parallel processing | 1993 |
| 231 |
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Davis, Alan L. | Data driven nets: a maximally concurrent, procedural, parallel process representation for distributed control systems | A procedural parallel process representation, known as data-driven nets is described. The sequencing mechanism of the data-driven representation is based on the principle of data dependency. Operations are driven into action by the arrival of the required working set of input operands. Execution of ... | Data driven nets | 1978 |
| 232 |
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Davis, A.L. | Dataflow computers: a tutorial and survey | The demand for very high performance computer has encouraged some researchers in the computer science field to consider alternatives to the conventional notions of program and computer organization. The dataflow computer is one attempt to form a new collection of consistent systems ideas to improve ... | Dataflow computers | 1980 |
| 233 |
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Susarla, Sai R.; Carter, John | DataStations: ubiquitous transient storage for mobile users | In this paper, we describe DataStations, an architecture that provides ubiquitous transient storage to arbitrary mobile applications. Mobile users can utilize a nearby DataStation as a proxy cache for their remote home file servers, as a file server to meet transient storage needs, and as a platf... | DataStations; Ubiquitous transient storage; Proxy cache | 2003-11-14 |
| 234 |
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Gopalakrishnan, Ganesh | Decomposing the proof of correctness of pipelined microprocessors | We present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction function using completion functions, one per unfinished instruction, each of which specify the effect (on the observables) of ... | Pipelined microprocessors; Proof of correctness | 1998 |
| 235 |
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Nguyen, Hoa Thanh; Nguyen, Thanh Hoang; Freire, Juliana | DeepPeep: A Form Search Engine | We present DeepPeep (http://www.deeppeep.org), a new search engine specialized in Web forms. DeepPeep uses a scalable infrastructure for discovering, organizing and analyzing Web forms which serve as entry points to hidden-Web sites. DeepPeep provides an intuitive interface that allows users t... | | |
| 236 |
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Bargteil, Adam Wade | Deformation embedding for point-based elastoplastic simulation | We present a straightforward, easy-to-implement, point-based approach for animating elastoplastic materials. The core idea of our approach is the introduction of embedded space-the least-squares best fit of the material's rest state into three dimensions. Nearest neighbor queries in the embedded spa... | | 2014-01-01 |
| 237 |
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Keller, Robert M. | Denotational models for parallel programs with indeterminate operators | Several approaches to networks of concurrently-operating modules involving indeterminacy are discussed. Techniques for representing the denotational semantics of such networks, and for verifying properties of them, are presented, including an oracle approach, an axiomatic approach, a data-type reduc... | Denotational models; Indeterminate operators | 1977 |
| 238 |
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Regehr, John | Deriving abstract transfer functions for analyzing embedded software | This paper addresses the problem of creating abstract transfer functions supporting dataflow analyses. Writing these functions by hand is problematic: transfer functions are difficult to understand, difficult to make precise, and difficult to debug. Bugs in transfer functions are particularly seriou... | | 2006-01-01 |
| 239 |
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Gopalakrishnan, Ganesh | Deriving efficient cache coherence protocols through refinement | We address the problem of developing efficient cache coherence protocols for use in distributed systems implementing distributed shared memory (DSM) using message passing. A serious drawback of traditional approaches to this problem is that the users are required to state the desired coherence prot... | Cache coherence protocols; DSM; Message passing | 1997 |
| 240 |
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Zhang, Lixin | Description of functionality of the impulse memory controller | This document describes the functionality and control flow models for each component of the impulse main memory controller. | Impulse memory controller | 2001 |
| 241 |
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Zhang, Lixin | Design a DRAM backend for the impulse memory system | The Impulse Adaptable Memory System is a new memory system that exposes DRAM access patterns not seen in conventional memory systems. Impulse can generate huge number of small DRAM accesses, which will not be handled effectively by a conventional cache-line-size-access-oriented DRAM backend. In this... | DRAM; Backend; Impulse memory system; Impulse Adaptable Memory System; Access patterns | 2000 |
| 242 |
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Carter, John B. | Design alternatives for shared memory multiprocessors | In this paper. we consider the design alternatives available for building the next generation DSM machine (e.g., the choice of memory architecture, network technology, and amount and location of per-node remote data cache). To investigate this design space, we have simulated six applications on a wi... | Shared memory multiprocessors | 1998 |
| 243 |
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Fujimoto, Richard M.; Gopalakrishnan, Ganesh | Design and evaluation of the rollback chip: special purpose hardware for time warp | The Time Warp mechanism offers an elegant approach to attacking difficult clock synchronization problems that arise in applications such as parallel discrete event simulation. However, because Time Warp relies on a lookahead and rollback mechanism to achieve widespread exploitation of parallelism, t... | Rollback chip; Time Warp mechanism; Clock synchronization; Parallel discrete event simulation | 1988 |
| 244 |
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Dintelman, Sue Marie Thompson | Design and implementation of a relational data base system for a minicomputer | A data base system provides the advantages of centralized control of data including increased data independence. Design specifications for a low level relational data base interface are given in the form of a formal description which separates the implementation details from the description of the ... | Data base system | 1977 |
| 245 |
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Jacobson, Hans | Design and validation of a simultaneous multi-threaded DLX processor | Modern day computer systems rely on two forms of parallelism to achieve high performance, parallelism between individual instructions of a program (ILP) and parallelism between individual threads (TLP). Superscalar processors exploit ILP by issuing several instructions per clock, and multiprocessors... | DLX processor; Validation | 1999 |
| 246 |
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Gopalakrishnan, Ganesh | Design and verification of the rollback chip using HOP: a case study of formal methods applied to hardware design | The use of formal methods in hardware design improves the quality of designs in many ways: it promotes better understanding of the design; it permits systematic design refinement through the discovery of invariants; and it allows design verification (informal or formal). In this paper we illustrate ... | Rollback chip; Verification; HOP; Hardware design; RBC | 1990 |
| 247 |
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Hansen, Charles D. | Design of 2D time-varying vector fields | Design of time-varying vector fields, i.e., vector fields that can change over time, has a wide variety of important applications in computer graphics. Existing vector field design techniques do not address time-varying vector fields. In this paper, we present a framework for the design of time-vary... | | 2012-01-01 |
| 248 |
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Carter, John B. | Design of a parallel vector access unit for SDRAM memory systems | Parallel Vector Access is a technique that exploits the regularity of vector or stream accesses to perform them efficiently in parallel on a multi-bank memory system. The performance of applications that have vector accesses may be improved using a memory controller that performs scatter/gather oper... | Parallel vector access; SDRAM memory; Multi-bank memory system | 1999 |
| 249 |
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Lindstrom, Gary E. | The design of object-oriented meta-architectures for programming languages | This paper is a survey of the design of four object-oriented meta-level architectures for programming languages. We present overviews and compare the salient features of the meta-architectures of Smalltalk, Common Lisp Object System (CLOS), a Scheme Compiler, and Etyma, our framework for modular sy... | Meta-level architectures; Design | 1994 |
| 250 |
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Freier, Rodney; Thompson, William B. | Design-space exploration of most-recent-only communication using myrinet on SGI ccNUMA architectures | SGI's current ccNUMA multiprocessor architectures offer high scalability and performance without sacrificing the ease of use of simpler SMP systems. Although these systems also provide a standard PCI expansion bus, the bridging between PCI and SGI's ccNUMA architecture invalidates the assumptions ty... | Most-recent-only communication; Myrinet; SGI; Communications latencies | 1999 |
