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CreatorTitleDescriptionSubjectDate
76 Stevens, KennethRelative timingAbstract-Relative timing (RT) is introduced as a method for asynchronous design. Timing requirements of a circuit are made explicit using relative timing. Timing can be directly added, removed, and optimized using this style. RT synthesis and verification are demonstrated on three example circuits,...2003
77 Myers, Chris J.Direct synthesis of timed asynchronous circuitsThis paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. Our synthesis procedure begins with a deterministic signal transition graph specification to which timing constraints can be added. First, a timing analysis ex...1999
78 Brunvand, Erik L.A partial scan methodology for testing self-timed circuitsThis paper presents a partial scan method for testing control sections of macromodule based self-timed circuits for stuck-at faults. In comparison with other proposed test methods for self-timed circuits, this technique offers better fault coverage than methods using self-checking techniques, and ...1995
79 Khan, Faisal HabibMultilevel modular capacitor clamped DC-DC converterA novel topology of multilevel modular capacitor clamped dc-dc converter (MMCCC) will be presented in this paper. In contrast to the conventional flying capacitor multilevel dc-dc converter (FCMDC), this new topology is completely modular and requires a simpler gate drive circuit. Moreover, the new ...Capacitor-clamped converter; DC-DC converter; MMCCC; Multilevel modular capacitor2006-12
80 Myers, Chris J.Timed circuits: a new paradigm for high-speed designAbstract| In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino circuits used in IBM's gigahertz processor (GUTS) and asynchronous circuits used in Intel's RAPPID instruction length de...2001
81 Jacobson, Hans; Gopalakrishnan, GaneshApplication specific asynchronous microengines for efficient high-level controlDespite the growing interest in asynchronous circuits programmable asynchronous controllers based on the idea of microprogramming have not been actively pursued Since programmable control is widely used in many commercial ASICs to allow late correction of design errors to easily upgrade product f...Asynchronous microengines1997
82 Stevens, KennethThe post office experience: designing a large asynchronous chipThe Post Office is an asynchronous, 300,000 transistor, full-custom CMOS chip designed as the communication component for the Mayfly scalable parallel processor. Performance requirements led to the development of a design style which permits the design of sequential circuits operating under a rest...1993
83 Brunvand, Erik L.Testing self-timed circuits using partial scanThis paper presents a partial scan method for testing both the control and data path parts of macromodule based self-timed circuits for stuck-at faults. Compared with other proposed test methods for testing control paths in self-timed circuits, this technique offers better fault coverage under a st...1995
84 Sanchez, Thomas W.Walling in or walling out: gated communitiesIt has been four decades since the United States legally outlawed all forms of public discrimination - in housing, education, transportation, and accommodations. Yet today, we are seeing a new form of discrimination -- the gated, walled, private community. Americans are electing to live behind wall...2007
85 Khan, Faisal HabibQuantifying device degradation in live power converters using SSTDR assisted impedance MatrixA noninterfering measurement technique designed around spread spectrum time domain reflectometry (SSTDR) has been proposed in this paper to identify the level of aging associated with power semiconductor switches inside a live converter circuit. Power MOSFETs are one of the most age-sensitive compon...2014-01-01
86 Davis, AlAn introduction to asynchronous circuit designThe purpose of this monograph is to provide both an introduction to field of asynchronous digital circuit design and an overview of the practical state of the art in 1997. In the early days of digital circuit design, little distinction was made between synchronous and asynchronous circuits. However,...Asynchronous circuit design1997
87 Brunvand, Erik L.Peephole optimization of asynchronous macromodule networksMost high level synthesis tools for asynchronous circuits take descriptions in concurrent hardware description languages and generate networks of macromodules or handshake components. In this paper we describe a peephole optimizer for such macromodule networks that often effects area and/or time im...1994
88 Lupton, John MarkTime-gated electroluminescence spectroscopy of polymer light-emitting diodes as a probe of carrier dynamics and trappingWe present time-gated electroluminescence (EL) spectroscopy of a polyfluorene-based conjugated polymer. The technique is shown to be sensitive enough to pick out impurity emission orders of magnitude weaker than the cw emission. By considering the temperature dependence of the delayed emission spect...Time-gated electroluminescence spectroscopy; Carrier dynamics; Trapping; Delayed emission2002-04
89 Furse, Cynthia M.Capacitance and inductance sensor circuits for detecting the lengths of open- and short-circuited wiresThe length of an open- or short-circuited wire is linearly proportional to the capacitance or inductance of the wire, respectively. Several types of simple and inexpensive circuits are introduced to measure these values. Open-circuited (capacitance) measurements are very effective. Short-circuited ...Aging aircraft wire; Capacitance sensors; Fault detection; Inductance sensors2009-08
90 Jacobson, HansApplication specific asynchronous microgengines for efficient high-level controlDespite the growing interest in asynchronous circuits, programmable asynchronous controllers based on the idea of microprogramming have not been actively pursued. Since programmable control is widely used in many commercial ASICs to allow late correction of design errors, to easily upgrade product ...Asynchronous microgengines; Programmable asynchronous controllers1997
91 Harrison, Reid R.Low-power low-noise CMOS amplifier for neural recording applicationsThere is a need among scientists and clinicians for low-noise low-power biosignal amplifiers capable of amplifying signals in the millihertz-to-kilohertz range while rejecting large dc offsets generated at the electrode-tissue interface. The advent of fully implantable multielectrode arrays has cre...Bioamplifier; Analog integrated circuits; Biosignal amplifier; Low noise; Low-power circuit design; Neural recordings; Neural amplifier; Noise efficiency factor; Subthreshold circuit design; Weak inversion2003-06
92 Stevens, KennethCharacterization of asynchronous templates for integration into clocked CAD flowsAsynchronous circuit design can result in substantial benefits of reduced power, improved performance, and high modularity. However, asynchronous design styles are largely incompatible with clocked CAD, which has prevented wide-scale adoption. The key incompatibility is timing. Thus most commercial...2009
93 Brunvand, Erik L.Critical hazard free test generation for asynchronous circuitsWe describe a technique to generate critical hazard-free tests for self-timed control circuits build using a macromodule library, in a partial scan based DFT environment. We propose a 6 valued algebra to generate these tests which are guaranteed to be critical hazard free under an unbounded delay m...1997
94 Smith, Kent F.PPL quick reference guide (CMOS)This work was supported in part by Defense Research Projects Agency under Contract Number DAAK1184K0017. All opinions, findings, conclusions or recommendations expressed in this document are those of the author(s) and do not necessarily reflect the view of DARPA.CMOS1987
95 Myers, Chris J.Direct synthesis of timed asynchronous circuitsThis paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. Our synthesis procedure begins with a deterministic signal transition graph specification to which timing constraints can be added. First, a timing analysis ex...1992
96 Warner, Homer R.Automated Transformation of Probabilistic Knowledge for a Medical Diagnostic SystemBiomedical Informatics1994
97 Warner, Homer R.Automated Transformation of Probablistic Knowledge for a Medical Diagnostic SystemBiomedical Informatics1994
98 Brunvand, Erik L.DFT for fast testing of self-timed control circuitsIn this paper, we present a methodology to perform fast testing of the control path of self-timed circuits [91]. The speedup is achieved by testing all the execution paths in the control simultaneously. The circuits considered in this paper are those designed using an OCCAM based circuit compile...1995
99 Boehme, ChristophElectrical detection of coherent 31P spin quantum statesIn recent years, a variety of solid-state qubits has been realized, including quantum dots [1, 2], superconducting tunnel junctions [3, 4] and point defects [5, 6]. Due to its potential compatibility with existing microelectronics, the proposal by Kane [7, 8] based on phosphorus donors in Si has als...Spin quantum states; Qubits; Rabi flops2006-11-19
100 Christensen, Douglas A.Biosensor development at the University of UtahInterest in biosensors has increased rapidly in the past few years due to the many potential advantages of these devices, such as small size, speed of response, and specificity 111. The term "biosensor" in the broad sense describes any device or apparatus which detects biological signals for the pu...Silicon retina; Photosensing array; CHEMFET; Fluorescence lmmunosensor; Planar waveguide1994-07
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