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Creator | Title | Description | Subject | Date |
76 |
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Balasubramonian, Rajeev | Architecting efficient interconnects for large caches with CACTI 6.0 | Efficiently executing multithreaded applications on future multicores will require fast intercore communication. Most of this communication happens via reads and writes to large shared caches in the memory hierarchy. Microprocessor performance and power will be strongly influenced by the long inter... | Interconnects; CACTI 6.0; Non-uniform cache architectures (NUCA) | 2008-01 |
77 |
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Parker, Steven G. | Integrating component-based scientific computing software | In recent years, component technology has been a successful methodology for large-scale commercial software development. Component technology combines a set of frequently used functions in a component and makes the implementation transparent to users. Software application developers typically conne... | SCIRun; BioPSE; Component technology; Computational steering; Problem solving environment; Distributed computing | 2006 |
78 |
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Christensen, Douglas A. | Biosensor development at the University of Utah | Interest in biosensors has increased rapidly in the past few years due to the many potential advantages of these devices, such as small size, speed of response, and specificity 111. The term "biosensor" in the broad sense describes any device or apparatus which detects biological signals for the pu... | Silicon retina; Photosensing array; CHEMFET; Fluorescence lmmunosensor; Planar waveguide | 1994-07 |
79 |
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Fujimoto, Richard M. | Systolic array synthesis by static analysis of program dependencies | We present a technique for mapping recurrence equations to systolic arrays. While this problem has been studied in fairly great detail, the recurrence equations that are analysed here are a generalization of those studied previously. In a n earlier paper (14] we have showed how systolic arrays can b... | Systolic array synthesis; static analysis; program dependencies; recurrence equations | 1986 |
80 |
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Lindstrom, Gary E. | Modular language processors as framework completions | The conceptual and specificational power of denotational semantics for programming language design has been amply demonstrated. We report here on a language implementation method that is similarly semantically motivated, but is based upon object-oriented design principles, and results in flexible an... | Modular language processors; Denotational semantics; Framework completions | 1993 |
81 |
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Carter, John B. | The avalanche myrinet simulation package user manual for V2.0 | This is a user manual for Version 2.0 of the Myrinet simulation package Users of the V2.0 pack age can specify arbitrary network topologies composed of Myrinet switches with different number of ports For example port and 4-port switches can be used in a single system Because the V2.0 model suppor... | Avalanche Myrinet; Simulation Package; user manual; Myrinet switches; Port switches | 1996 |
82 |
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Davis, A.L. | Dataflow computers: a tutorial and survey | The demand for very high performance computer has encouraged some researchers in the computer science field to consider alternatives to the conventional notions of program and computer organization. The dataflow computer is one attempt to form a new collection of consistent systems ideas to improve ... | Dataflow computers | 1980 |
83 |
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Henderson, Thomas C. | Agent-based engineering drawing analysis | Interpretation of paper drawings has received a good deal of attention over the last decade. Related areas such as direct interpretation of human drawings (HCI), search and indexing of graphics databases, and knowledge representation in the domain of graphics and drawing understanding have also s... | Interpretation; Human drawings; HCI; Graphic databases | 2002-02-04 |
84 |
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Balasubramonian, Rajeev | Power efficient approaches to redundant multithreading | Noise and radiation-induced soft errors (transient faults) in computer systems have increased significantly over the last few years and are expected to increase even more as we move toward smaller transistor sizes and lower supply voltages. Fault detection and recovery can be achieved through redund... | Reliability; Power; Transient faults; Soft errors; Redundant multithreading (RMT); Heterogeneous chip multiprocessors dynamic frequency scaling | 2007-08 |
85 |
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Fujimoto, Richard M. | The virtual time machine | Existing multiprocessors and multicomputers require the programmer or compiler to perform data dependence analysis at compile time. We propose a parallel computer that performs this task at runtime. In particular, the Virtual Time Machine (VTM) detects violations of data dependence constraints as th... | | 1988 |
86 |
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Balasubramonian, Rajeev | CHOP: adaptive filter-based DRAM caching for CMP server platforms | As manycore architectures enable a large number of cores on the die, a key challenge that emerges is the availability of memory bandwidth with conventional DRAM solutions. To address this challenge, integration of large DRAM caches that provide as much as 5× higher bandwidth and as low as 1/3rd of... | CHOP; DRAM caching; CMP server platforms; Manycore architectures; Hot page; Filter cache; Multi-core processors | 2010 |
87 |
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Brunvand, Erik L. | Practical advances in asynchronous design | Recent practical advances in asynchronous circuit and system design have resulted in renewed interest by circuit designers. Asynchronous systems are being viewed as in increasingly viable alternative to globally synchronous system organization. This tutorial will present the current state of the art... | | 1997 |
88 |
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Eide, Eric Norman; Regehr, John; Lepreau, Jay | Dynamic CPU management for real-time, middleware-based systems | Many real-world distributed, real-time, embedded (DRE) systems, such as multi-agent military applications, are built using commercially available operating systems, middleware, and collections of pre-existing software. The complexity of these systems makes it difficult to ensure that they maintai... | CPU management | 2004-01-30 |
89 |
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Carter, John B. | MP-LOCKs: Replacing hardware synchronization primitives with message passing | Shared memory programs guarantee the correctness of concurrent accesses to shared data using interprocessor synchronization operations. The most common synchronization operators are locks, which are traditionally implemented in user-level libraries via a mix of shared memory accesses and hardware sy... | MP-LOCKs; Message passing; Shared memory programs; Synchronization operators; Synchronization primitives | 2011-05 |
90 |
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Balasubramonian, Rajeev | MemZip: exploring unconventional benefits from memory compression | Memory compression has been proposed and deployed in the past to grow the capacity of a memory system and reduce page fault rates. Compression also has secondary benefits: it can reduce energy and bandwidth demands. However, most prior mechanisms have been designed to focus on the capacity metric an... | | 2014-01-01 |
91 |
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Khan, Malik Murtaza | Auto-tuning for memory hierarchy optimizations in GPUs | | | 2010-02-26 |
92 |
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| Industrial revolutions: from canal systems to computer networks | Today's so-called "Information Revolution" is often compared to past industrial revolutions, especially a British Industrial Revolution which took place between 1750 and 1830 and a Second Industrial Revolution which is believed to have occurred in the United States between 1880 and 1940. The compari... | Information technology; Information Age | 2000 |
93 |
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Regehr, John | Dynamic CPU management for real-time, middleware-based systems | Many real-world distributed, real-time, embedded (DRE) systems, such as multi-agent military applications, are built using commercially available operating systems, middleware, and collections of pre-existing software. The complexity of these systems makes it difficult to ensure that they maintain h... | | 2004-01-01 |
94 |
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Regehr, John | Eliminating the call stack to save RAM | Most programming languages support a call stack in the programming model and also in the runtime system.We show that for applications targeting low-power embedded microcontrollers (MCUs), RAM usage can be significantly decreased by partially or completely eliminating the runtime callstack. We presen... | | 2009-01-01 |
95 |
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Carter, Tony M. | Radix-16 signed-digit division | For use in the context of a linearly scalable arithmetic architecture supporting high/variable precision arithmetic operations (integer or fractional), a two-stage algorithm for fixed point, radix-16 signed-digit division is presented. The algorithm uses two limited precision radix-4 quotient digit ... | Radix-16; linearly scalable; arithmetic architecture | 1988 |
96 |
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Regehr, John | The case for hierarchical schedulers with performance guarantees | | | 2000-01-01 |
97 |
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Bohs, Lynn A. | Solanum allophyllum (Miers) Standl. and the generic delimitation of Cyphomandra and Solanum (Solanaceae) | Solanum allophyllum has previously been placed in Cyphomandra and in Solarium. This species has a number of morphological features not found in Cyphomandra, but has been included in the genus because it has a similar growth habit, three-leaved sympodial units with inflorescences in branch forks, and... | Solanum allophyllum; Cyphomandra | 1989 |
98 |
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Myers, Chris J. | A standard-cell self-timed multiplier for energy and area critical synchronous systems | This paper describes the design of a standard-cell self-timed multiplier for use in energy and area critical synchronous systems. The area of this multiplier is bounded by N rather than N2 as seen in more traditional combinational parallel array designs, where N is the word size. Energy has a polyn... | | 2001 |
99 |
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Normann, Richard A.; Abbasi, Masoud; Johansson,Torbjorn | Silicon carbide enhanced thermomigration | The widespread acceptance of thermomigration technology to produce through-chip interconnects has been impaired by (i) a random walk of the Si-Al liquid eutectic inclusion as it traverses the wafer, and (ii) a ?surface barrier? which allows thermomigration of only relatively large inclusions. In ... | Silicon Dioxide; Thermometers; Transducers; Thermomigration Technology; Infrared Lamps | 1992 |
100 |
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Stoller, Leigh B. | Low latency workstation cluster communications using sender-based protocols | The use of workstations on a local area network to form scalable multicomputers has become quite common. A serious performance bottleneck in such "carpet clusters" is the communication protocol that is used to send data between nodes. We report on the design and implementation of a class of communic... | Workstations; Scalable multicomputers; Sender-based; Communication protocols | 1996 |