Filters: Collection: "ir_uspace"
| Creator | Title | Description | Subject | Date | ||
|---|---|---|---|---|---|---|
| 401 |
 |
Boll, Steven F.; Done, William John | Noise suppression methods for robust speech processing (1 Oct. 1978- 31 Mar. 1981) | Robust speech processing in practical operating environments requires effective environmental and processor noise suppression. This report describes the technical findings and accomplishments during this reporting period for period for research program funded to develop real time, compressed speech ... | Noise suppression; Compressed speech analysis-synthesis algorithms; Signal contamination | 1978 |
| 402 |
 |
Stoller, Leigh B. | Paint: PA instruction set interpreter | This document describes Paint, an instruction set simulator based on Mint[3]. Paint interprets the PA-RISC instruction set, and has been extended to support the Avalanche Scalable Computing Project[2]. These extensions include a new process model that allows multiple programs to be run on each proce... | Paint; Instruction set simulator; Mint; Avalanche Scalable Computing Project | 1996 |
| 403 |
 |
Carter, Tony M. | The path programmable logic (PPL) user's manual | This manual describes the primitive NMOS path programmable logic cells currently in use at the University of Utah. It contains detailed descriptions, schematics and composite layout of all cells. Also included are PPL programming rules as well as layout design rules for each cell set. | 1982 | |
| 404 |
 |
Balasubramonian, Rajeev | Power-efficient approaches to reliability | Radiation-induced soft errors (transient faults) in computer systems have increased significantly over the last few years and are expected to increase even more as we move towards smaller transistor sizes and lower supply voltages. Fault detection and recovery can be achieved through redundancy. St... | Radiation-induced; Soft errors; Transient faults; Redundant thread; Trailing thread; Power consumption | 2005 |
| 405 |
 |
Brunvand, Erik L. | Reduced latency self-timed FIFO circuits | Self-timed flow-through FIFOs are constructed easily using only a single C-element as control for each stage of the FIFO. Throughput can be very high in FIFOs of this type because new data can be sent to the FIFO after communicating locally with only the first element of the FIFO. Therefore the thro... | FIFO circuits; Self-timed; Flow-through; Reduced latency | 1994 |
| 406 |
 |
Carter, John B. | Reducing consistency traffic and cache misses in the avalanche multiprocessor | For a parallel architecture to scale effectively, communication latency between processors must be avoided. We have found that the source of a large number of avoidable cache misses is the use of hardwired write-invalidate coherency protocols, which often exhibit high cache miss rates due to exces... | Consistency traffic; Cache misses; Parallel architecture; Communication latency | 1995 |
| 407 |
 |
Balasubramonian, Rajeev | Scalable, reliable, power-efficient communication for hardware transactional memory | In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true for a large-scale distributed memory system where multiple transactions may attempt to commit simultaneously and co-ordin... | Hardware; Transactional memory; Communication | 2008 |
| 408 |
 |
Boll, Steven F. | Selected methods for improving synthesis speech quality using linear predictive coding: system description, coefficient smoothing and streak | This report develops two generalizations of the standard Linear Predictive Coding (LPC) implementation of a narrow band speech compression system. The purpose of each method is to improve the speech quality that is available from a standard LPC system. | Linear Predictive Coding; LPC; Speech compression system; Pitch excited system | 1974 |
| 409 |
 |
Hoogenboom, Peter J. | Semantic definition of a subset of the structured query language (SQL) | SQL is a relational database definition and manipulation language. Portions of the manipulation language are readily described in terms of relational algebra. The semantics of a subset of the SQL select statement is described. The select statement allows the user to query the database. The select st... | 1991 | |
| 410 |
 |
Sikorski, Christopher; Pardyjak, Eric R. | Source characterization of atmospheric releases using quasi-random sampling and regularized gradient optimization | In the present work, an inversion technique to solve the atmospheric source characterization problem is described. The inverse problem comprises characterizing the source (x, y and z coordinates and the source strength) and the meteorological conditions (wind speed and wind direction) at the sourc... | Source characterization; Gaussian plume model; Quasi-Monte Carlo (QMC); Regularization; Newton?s method; Line-search; Tikhonov stabilizing functional; Adaptive regularization | 2009 |
| 411 |
 |
Eide, Eric Norman | Static and dynamic structure in design patterns | Design patterns are a valuable mechanism for emphasizing structure, capturing design expertise, and facilitating restructuring of software systems. Patterns are typically applied in the context of an object-oriented language and are implemented so that the pattern participants correspond to obje... | Design patterns; Static structure; Dynamic structure | 2001-11-01 |
| 412 |
 |
Gu, Jun | Structured, technology independent VLSI design | Rapid advancement in new semiconductor technologies has created a need for the design of existing integrated circuits using these new technologies. These new technologies are required to provide improved performance, smaller feature sizes and lower costs. The conversion of an integrated circuit fro... | VLSI design; semiconductor technologies | 1989 |
| 413 |
 |
Henderson, Thomas C.; Sikorski, Christopher | Symmetry: a basis for sensorimotor reconstruction | Given a set of unknown sensors and actuators, sensorimotor reconstruction is achieved by exploiting relations between the sensor data and the actuator control data to determine sets of similar sensors, sets of similar actuators, necessary relations between them, as well as sensorimotor relations ... | sensorimotor reconstruction; sensor data; actuator control data | 2011 |
| 414 |
 |
Organick, Elliott I. | Transformation of Ada program units into silicon (Fourth Semiannual technical report 83 Apr 1 - 83 Nov 15) | This report, augmented with several appended papers and supplementary reports describes the most recent six months of work on the research project, "Transformation of Ada Programs into Silicon". This report is also the last of the series to be rendered under the current contact. | Transformation; Ada program units; Silicon | 1983 |
| 415 |
 |
Organick, Elliott I. | Transformation of ADA programs into silicon (82 Mar. 1 - 82 Oct. 31) | This report outlines the beginning steps taken in an integrated research effort toward the development of a methodology, and supporting systems, for transforming Ada programs, or program units, (directly) into corresponding VLSI systems. The time seems right to expect good results. The need is evide... | Transformation; Silicon; Ada program units | 1982 |
| 416 |
 |
Davis, Alan L. | A characterization of parallel systems | a taxonomy for parallel processing systems is presented which has some advantages over previous taxonomies. The taxonomy characterizes parallel processing systems using four parameters: topology, communication, granularity, and operation. These parameters and used repetitively in a hierarchical fash... | Parallel systems | 1980 |
| 417 |
 |
Gopalakrishnan, Ganesh | A compositional model for synchronous VLSI systems | Currently available hardware specification languages have two serious deficiencies: (i) inadequate protocol definition capabilities; (ii) lack of a compositional model. We now explain these in more detail. | Very large scale integration; VLSI systems | 1987 |
| 418 |
 |
Yang, Yue; Gopalakrishnan, Ganesh; Lindstrom, Gary E. | A generic operational memory model specification framework for multithreaded program verification | Given the complicated nature of modern architectural and language level memory model designs, it is vital to have a systematic ap- proach for specifying memory consistency requirements that can support verification and promote understanding. In this paper, we develop a spec- ification methodolog... | Multithreaded program verification | 2003 |
| 419 |
 |
Sobh, Tarek M. | A graphical environment and applications for discrete event and hybrid systems in robotics and automation | In this paper we present an overview for the development of a graphical environment for simulating, analyzing, synthesizing, monitoring, and controlling complex discrete event and hybrid systems within the robotics, automation, and intelligent system domain. We start by presenting an overview of di... | Intelligent system domain; Graphical environment | 1994 |
| 420 |
 |
Gouraud, Henri | A programmer's guide to PDP-10 euler | This manual describes the EULER language as implemented on the DEC PDP-10 computer. EULER is a block-structured language, similar to Algol-60 but simplified by omitting type declarations and by altering the way procedures are defined and called. PDP-10 EULER includes features for list-and array-mani... | EULER language | 1970 |
| 421 |
 |
Lindstrom, Gary E. | Alpha-beta pruning on evolving game trees | The alpha-beta strategy is a widely used method for economizing on the size of game trees. Heretofore, its application has been limited to depth-first tree growth in recursive search functions. However, many modern game players use retentive (i.e. coroutine-based) control to achieve greater attentio... | Alpha-beta pruning; Game trees | 1979 |
| 422 |
 |
Henderson, Thomas C. | An O(n) time discrete relaxation architecture for real-time processing of the consistent labeling problem | Discrete relaxation techniques have proven useful in solving a wide range of problems in digital signal and digital image processing, artificial intelligence, operations research, and machine vision. Much work has been devoted to finding efficient hardware architectures. This paper shows that a conv... | Discrete relaxation techniques | 1986 |
| 423 |
 |
Carter, John B. | Avalanche: A communication and memory architecture for scalable parallel computing | As the gap between processor and memory speeds widens, system designers will inevitably incorporate increasingly deep memory hierarchies to maintain the balance between processor and memory system performance. At the same time, most communication subsystems are permitted access only to main memory ... | Avalanche; Computer memory; Memory architecture | 1995 |
| 424 |
 |
Zhang, Lixin | Design a DRAM backend for the impulse memory system | The Impulse Adaptable Memory System is a new memory system that exposes DRAM access patterns not seen in conventional memory systems. Impulse can generate huge number of small DRAM accesses, which will not be handled effectively by a conventional cache-line-size-access-oriented DRAM backend. In this... | DRAM; Backend; Impulse memory system; Impulse Adaptable Memory System; Access patterns | 2000 |
| 425 |
 |
Fujimoto, Richard M.; Gopalakrishnan, Ganesh | Design and evaluation of the rollback chip: special purpose hardware for time warp | The Time Warp mechanism offers an elegant approach to attacking difficult clock synchronization problems that arise in applications such as parallel discrete event simulation. However, because Time Warp relies on a lookahead and rollback mechanism to achieve widespread exploitation of parallelism, t... | Rollback chip; Time Warp mechanism; Clock synchronization; Parallel discrete event simulation | 1988 |