Creator | Title | Description | Subject | Date | ||
---|---|---|---|---|---|---|
1 |
![]() | Akella, Venkatesh | hopCP: language definition, semantics and examples | We describe a formalism for high level modeling of hardware based on flow graphs and nonatomic actions called hopCP. A module is the description of a hardware system in hopCP, which contains a flow graph to model the behavioral aspects and ports which represent the communication links. Operations ar... | hopCP | 1990 |
2 |
![]() | Gopalakrishnan, Ganesh | hopCP: A concurrent hardware description language | hopCP is a language for the specification, simulation, and synthesis of hardware systems. hopCP captures the behavior of a hardware system by specifying the causal relationships between actions that the system can perform. No specific timing discipline is implied by a hopCP specification. Hence, hop... | hopCP; Hardware systems | 1991 |
3 |
![]() | Gopalakrishnan, Ganesh | Hierarchical action refinement: a methodology for compiling asynchronous circuits from a concurrent HDL | A hardware specification formalism called hopCP is introduced, hopCP provides an uniform notation t o describe the causal relationships between a set of nonatomic actions which capture the computational, concurrency, control and communication aspects of hardware behavior. A systematic approach to sy... | Hierarchical action refinement; Hardware specification formalism; hopCP | 1991 |
4 |
![]() | Khoche, Ajay | An extended cell set of self-timed designs | The high level synthesis approach described in [1] uses hopCP[2] language for behavioral descriptions. The behavioral specifications are then translated into Hop Flow Graphs (HFGs). The actions in the graph are then refined such that refined actions can be directly mapped onto asynchronous circuit b... | Self-timed designs; hopCP; Hop Flow Graphs; Asynchronous circuit blocks; Action-blocks | 1993 |
5 |
![]() | Akella, Venkatesh; Gopalakrishnan, Ganesh | Specification and validation of control intensive ICs in hopCP | Control intensive ICs pose a significant challenge to the users of formal methods in designing hardware. These ICs have to support a wide variety of requirements including synchronous and asynchronous operations polling and interrupt driven modes of operation multiple concurrent threads of executi... | Asynchrony; Behavioral simulation; Formal methods; Hardware description languages; Formal specifiation and validation; hopCP | 1992 |
6 |
![]() | Gopalakrishnan, Ganesh | Specification and validation of control-intensive integrated circuits in hopCP | Control intensive ICs pose a significant challenge to the users of formal methods in designing hardware. These ICs have to support a wide variety of requirements including synchronous and asynchronous operations, polling and interrupt-driven modes of operation, multiple concurrent threads of execut... | control-intensive; integrated circuits; hopCP; Computer hardware design; Validation | 1992 |