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Filters: Collection: "ir_uspace" Subject: "Impulse Adaptable Memory System"
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1 Zhang, LixinA DRAM backend for the impulse memory systemThe Impulse Adaptable Memory System exposes DRAM access patterns not seen in conventional memory systems. For instance, it can generate 32 DRAM accesses each of which requests a four-byte word in 32 cycles. Conventional DRAM backends are optimized for accesses that request full cache lines. They m...Impulse Adaptable Memory System; DRAM1998-12-16
2 Zhang, LixinDesign a DRAM backend for the impulse memory systemThe Impulse Adaptable Memory System is a new memory system that exposes DRAM access patterns not seen in conventional memory systems. Impulse can generate huge number of small DRAM accesses, which will not be handled effectively by a conventional cache-line-size-access-oriented DRAM backend. In this...DRAM; Backend; Impulse memory system; Impulse Adaptable Memory System; Access patterns2000
3 Zhang, LixinISIM: The simulator for the impulse adaptable memory systemThis document describes ISIM, the simulator for the Impulse Adaptable Memory System. Impulse adds two new features to a conventional memory system. First, it supports a configurable, extra level of address remapping at the memory controller. Second, it supports prefetching at the memory controller. ...ISIM; Impulse Adaptable Memory System; Memory systems1999
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