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| Creator | Title | Description | Subject | Date | ||
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 | Khoche, Ajay | An extended cell set of self-timed designs | The high level synthesis approach described in [1] uses hopCP[2] language for behavioral descriptions. The behavioral specifications are then translated into Hop Flow Graphs (HFGs). The actions in the graph are then refined such that refined actions can be directly mapped onto asynchronous circuit b... | Self-timed designs; hopCP; Hop Flow Graphs; Asynchronous circuit blocks; Action-blocks | 1993 |
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