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| Creator | Title | Description | Subject | Date | ||
|---|---|---|---|---|---|---|
| 1 |
 | Balasubramonian, Rajeev | Interconnect-aware coherence protocols for chip multiprocessors | Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future billion transistor architectures due to their low design complexity, high clock frequency, and high throughput. In a... | Interconnects; Chip multiprocessors; Coherence | 2006 |
| 2 |
 | Balasubramonian, Rajeev | Wire management for coherence traffic in chip multiprocessors | Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future billion transistor architectures due to their low design complexity, high clock frequency, and high throughput. In ... | Wire management; Coherence traffic; Chip multiprocessors; CMP; On-chip wires | 2005 |
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