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TitleDateTypeSetname
326 Formally specifying memory consistency models and automatically generating executable specifications2001Textir_uspace
327 Higher-order image statistics for unsupervised, information-theoretic, adaptive, image filtering2005-04-15Textir_uspace
328 The method of generated solutions for numerical verification of ICE code2007Textir_uspace
329 Monte Carlo sensor networks2005-01-20Textir_uspace
330 Nemos: a framework for axiomatic and executable specifications of memory consistency models2003Textir_uspace
331 On synthesizing systolic arrays from recurrence equations with linear dependencies1986Textir_uspace
332 The schema coercion problem1997Textir_uspace
333 Systolic array synthesis by static analysis of program dependencies1986Textir_uspace
334 Towards a verification technique for large synchronous circuits1992Textir_uspace
335 Towards a verification technique for large synchronous circuits1992Textir_uspace
336 TRACIS: transformations on Ada for circuit synthesis a report on the methodology for a silicon compiler1983Textir_uspace
337 Type-safe composition of object modules1994Textir_uspace
338 Visual summary statistics2007Textir_uspace
339 Sequencing computational events in heterogeneous distributed systems1990Textir_uspace
340 A characterization of visual feature recognition2003-09-03Textir_uspace
341 A correctness criterion for asynchronous circuit validation and optimization1992Textir_uspace
342 Abstract semantics for functional constraint programming1989Textir_uspace
343 Analyzing the Intel Itanium memory ordering rules using logic programming and SAT2003Textir_uspace
344 The architecture of DDMl: a recursively structured data driven machine1977Textir_uspace
345 Asynchronous circuit verification using trace theory and CCS1992Textir_uspace
346 Cache-rings for memory efficient isosurface construction1997Textir_uspace
347 Cluster-based interactive volume rendering with Simian2003-09-03Textir_uspace
348 Does the quality of the computer graphics matter when judging distances in visually immersive environments?2002-12-05Textir_uspace
349 Efficient instruction level simulation of computers1987Textir_uspace
350 Hierarchical action refinement: a methodology for compiling asynchronous circuits from a concurrent HDL1991Textir_uspace
326 - 350 of 676