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Creator | Title | Description | Subject | Date |
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Mahi, Robert | Scheduling multiprogammed computer systems: an analytical approach | In a multiprogrammed computer system, several jobs are using the facilities of the system at the same time. However, a given facility (or resource) is generally only allocated to one user at a time- But, while working, jobs generate requests for some facilities and liberate other facilities; thus, c... | Multiprogrammed computer system | 1970 |
2 |
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Fujimoto, Richard M. | Optimal performance of distributed simulation programs | This paper describes a technique to analyze the potential speedup of distributed simulation programs. A distributed simulation strategy is proposed which minimizes execution time through the use of an oracle to control the simulation. Because the strategy relies on an oracle, it cannot be used for ... | Distributed simulation programs | 1987 |
3 |
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Henderson, Thomas C. | The importance of unknows in Epidemiologic studies | 1. Epidemiologic study data often include omitted/unobtainable responses (unknowns). In most cases, unknowns are eliminated during data-reduction to facilitate analysis. We examined the effect that elimination of unknowns would have on mortality calculations using data on newborns admitted to a newb... | Unknowns; Mortality calculations | 1985 |
4 |
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Fujimoto, Richard M. | Efficient instruction level simulation of computers | A technique for creating efficient, yet highly accurate, instruction level simulation models of computers is described. In contrast to traditional approaches that use a software interpreter, this technique employs direct execution of application programs on the host computer. An assembly language pr... | Simulation models | 1987 |
5 |
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Hansen, Charles D. | Graphics applications for grid computing | The first article, "Enabling View-Dependent Progressive Volume Visualization on the Grid" by Alan Norton and Alyn Rockwood describes and evaluates the communication in a progressive, visibility-driven compression scheme for distributing volumetric data from grid resources to volume-rendering clien... | Grid computing | 2003-03 |
6 |
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Balasubramonian, Rajeev | Re-visiting the performance impact of microarchitectural floorplanning | The placement of microarchitectural blocks on a die can significantly impact operating temperature. A floorplan that is optimized for low temperature can negatively impact performance by introducing wire delays between critical pipeline stages. In this paper, we identify subsets of wire delays tha... | Microarchitectural floorplanning; Wire delays; Floorplanning algorithms; Microprocessor operating temperature; Critical loops; Pipelines | 2006 |
7 |
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Keller, Robert M. | Sentinels: A concept for multiprocess coordination | The sentinel construct is introduced, which provides a certain syntactic and semantic framework for multiprocess coordination. The advantage of this construct over others is argued to be semantic transparency, efficiency, ease in implementation, and usefulness in verfication. | Sentinels; Multiprocess coordination; Sentinel construct | 1978 |
8 |
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Gopalakrishnan, Ganesh | A correctness criterion for asynchronous circuit validation and optimization | We propose a new relation C. called strong conformance in the context of Dill's trace theory, and define B Q A to be true exactly when B conforms to A and the success set of B contains the success set of A. When B C. A, module B operated in module A's maximal environment AM (i.e. B || AM) exhibits a... | Validation; Optimization | 1992 |
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Balasubramonian, Rajeev | Exploiting eager register release in a redundantly multi-threaded processor | Due to shrinking transistor sizes and lower supply voltages, transient faults (soft errors) in computer systems are projected to increase by orders of magnitude. Fault detection and recovery can be achieved through redundancy. Redundant multithreading (RMT) is one attractive approach to detect and r... | Transient faults; Soft errors; Redundant multithreading; Eager register release; Register file design | 2006 |
10 |
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Richardson, William F. | Fred: an architecture for a self-timed decoupled computer | Decoupled computer architectures provide an effective means of exploiting instruction level parallelism. Self-timed micropipeline systems are inherently decoupled due to the elastic nature of the basic FIFO structure, and may be ideally suited for constructing decoupled computer architectures. Fred ... | Decoupled computer; Fred | 1995 |
11 |
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Brunvand, Erik L. | Fred: an architecture for a self-timed decoupled computer | Decoupled computer architectures provide an effective means of exploiting instruction level parallelism. Selftimed micropipeline systems are inherently decoupled due to the elastic nature of the basic FIFO structure, and may be ideally suited for constructing decoupled computer architectures. Fred ... | | 1996 |
12 |
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Kuramkote, Ravindra; Carter, John | Exploring the value of supporting multiple DSM protocols in Hardware DSM Controllers | The performance of a hardware distributed shared memory (DSM) system is largely dependent on its architect's ability to reduce the number of remote memory misses that occur. Previous attempts to solve this problem have included measures such as supporting both the CC-NUMA and S-COMA architectures is... | DSM; Controllers | 1999 |
13 |
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Schaelicke, Lambert | Profiling I/O interrupts in modern architectures | As applications grow increasingly communication-oriented, interrupt performance quickly becomes a crucial component of high performance I/O system design. At the same time, accurately measuring interrupt handler performance is difficult with the traditional simulation, instrumentation, or statistica... | | 1999 |
14 |
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Regehr, John | Surviving sensor network software faults | We describe Neutron, a version of the TinyOS operating system that efficiently recovers from memory safety bugs. Where existing schemes reboot an entire node on an error, Neutron's compiler and runtime extensions divide programs into recovery units and reboot only the faulting unit. The TinyOS kerne... | | 2009-01-01 |
15 |
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Jacobson, Hans | Design and validation of a simultaneous multi-threaded DLX processor | Modern day computer systems rely on two forms of parallelism to achieve high performance, parallelism between individual instructions of a program (ILP) and parallelism between individual threads (TLP). Superscalar processors exploit ILP by issuing several instructions per clock, and multiprocessors... | DLX processor; Validation | 1999 |
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Evans, David | Graphical man/machine communications: May 1971 | Final technical report 1 December 1969 to 30 June 1970. | | 1971-05 |
17 |
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Brunvand, Erik L. | Practical advances in asynchronous design and in asynchronous/synchronous interfaces | Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practical asynchronous circuit and system design in four areas: controllers, datapaths, processors, and the design of asynchr... | | 1999 |
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Riesenfeld, Richard F. | Computer aided design | The report is based on the proposal submitted to the National Science Foundation in September 1981, as part of the Coordinated Experimental Computer Science Research Program. The sections covering the budget and biographical data on the senior research personnel have not been included. Also, the sec... | | 1984 |
19 |
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Brunvand, Erik L. | The NSR processor | The NSR (Non-Synchronous RISC) processor is a general-purpose computer structured (IS U collection of self-timed blocks that operate concurrently and communicate over bundled data channels in the style of micropipelines [3, 16]. These blocks correspond to standard synchronous pipeline stages such ... | | 1993 |
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Brunvand, Erik L. | Practical advances in asynchronous design | Recent practical advances in asynchronous circuit and system design have resulted in renewed interest by circuit designers. Asynchronous systems are being viewed as in increasingly viable alternative to globally synchronous system organization. This tutorial will present the current state of the art... | | 1997 |
21 |
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Hibler, Michael J. | Notes on thread models in Mach 3.0 | During the Mach In-Kernel Servers work, we explored two alternate thread models that could be used to support traps to in-kernel servers. In the "migrating threads" model we used, the client's thread temporarily moves into the server's task for the duration of the call. In t h e "thread switching" ... | Thread models; In-kernel servers; Thread switching; Mach 3.0 | 1993 |
22 |
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Mathew, Binu K.; Davis, Al | A characterization of visual feature recognition | Natural human interfaces are a key to realizing the dream of ubiquitous computing. This implies that embedded systems must be capable of sophisticated perception tasks. This paper analyzes the nature of a visual feature recognition workload. Visual feature recognition is a key component of a numb... | Visual feature recognition; Human interfaces | 2003-09-03 |
23 |
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Myers, Chris J. | Technology mapping of timed circuits | Abstract This paper presents an automated procedure for the technology mapping of timed circuits to practical gate libraries. Timed circuits are a class of asynchronous circuits that incorporate explicit timing information in the specification which is used throughout the design process to optimi... | | 1995 |
24 |
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Myers, Chris J. | Architectural synthesis of timed asynchronous systems | This paper describes a new method for architectural synthesis of timed asynchronous systems. Due to the variable delays associated with asynchronous resources, implicit schedules are created by the addition of supplementary constraints between resources. Since the number of schedules grows exponenti... | | 1999 |
25 |
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Shirley, Peter S.; Parker, Steven G. | Temporally coherent interactive ray tracing | Although ray tracing has been successfully applied to interactively render large datasets, supersampling pixels will not be practical in interactive applications for some time. Because large datasets tend to have subpixel detail, one-sample-per-pixel ray tracing can produce visually distracting popp... | Temporally coherent; interactive ray tracing; large datasets | 2001 |