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Creator | Title | Description | Subject | Date |
| 101 |
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Evans, David | Graphical man/machine communications: December 1972 | The object of the graphical man/machine communication effort is the development of computers and computing techniques the people may use interactively in real time to extend their problem-solving capability, and to work cooperatively by means of improved communications via computer. This report summ... | Waveform processing; Symbolic computation; Man/machine communications | 1972-12 |
| 102 |
 |
Balasubramonian, Rajeev | Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures | Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper we propose a cache and TLB layout and design that leverages repeater insertion to provide dynamic low-cost configurability trading of size and speed on a per application ... | Translation lookaside buffer (TLB) | 2000 |
| 103 |
 |
Carter, John B. | MP-LOCKs: Replacing hardware synchronization primitives with message passing | Shared memory programs guarantee the correctness of concurrent accesses to shared data using interprocessor synchronization operations. The most common synchronization operators are locks, which are traditionally implemented in user-level libraries via a mix of shared memory accesses and hardware sy... | MP-LOCKs; Message passing; Shared memory programs; Synchronization operators; Synchronization primitives | 2011-05 |
| 104 |
 |
Balasubramonian, Rajeev | Power efficient resource scaling in partitioned architectures through dynamic heterogeneity | The ever increasing demand for high clock speeds and the desire to exploit abundant transistor budgets have resulted in alarming increases in processor power dissipation. Partitioned (or clustered) architectures have been proposed in recent years to address scalability concerns in future billion-tr... | Partitioned architectures; Clustered architectures; Energy × Delay2, Temperature; Dynamic frequency scaling; Thermal emergency | 2006 |
| 105 |
 |
Regehr, John | Scheduling Tasks with mixed preemption relations for robustness to timing faults | This paper introduces and shows how to schedule two novel scheduling abstractions that overcome limitations of existing work on preemption threshold scheduling. The abstractions are task clusters, groups of tasks that are mutually non-preemptible by design, and task barriers, which partition the tas... | | 2002-01-01 |
| 106 |
 |
Carter, John B. | A comparison of software and hardware synchronization mechanisms for distributed shared memory multiprocessors | Efficient synchronization is an essential component of parallel computing. The designers of traditional multiprocessors have included hardware support only for simple operations such as compare-and-swap and load-linked/store-conditional, while high level synchronization primitives such as locks, bar... | Hardware locks | 1996 |
| 107 |
 |
Johnson, Christopher R. | Construction of a human torso model from magnetic resonance images for problems in computational electrocardiography | Applying mathematical models to real situations often requires the use of discrete geometrical models of the solution domain. In some cases destructive measurement of the objects under examination is acceptable, but in biomedical applications the measurements come from imaging techniques such as X-r... | Human torso model; MRI | 1994 |
| 108 |
 |
Balasubramonian, Rajeev | Dynamically managing the communication-parallelism trade-off in future clustered processors | Clustered microarchitectures are an attractive alternative to large monolithic superscalar designs due to their potential for higher clock rates in the face of increasingly wire-delay-constrained process technologies. As increasing transistor counts allow an increase in the number of clusters, th... | Clustered architectures; Microarchitecture; Decentralized cache; Interconnects | 2003 |
| 109 |
 |
Carter, John B. | Evaluating the potential of programmable multiprocessor cache controllers | The next generation of scalable parallel systems (e.g., machines by KSR, Convex, and others) will have shared memory supported in hardware, unlike most current generation machines (e.g., offerings by Intel, nCube, and Thinking Machines). However, current shared memory architectures are constrained b... | Programmable multiprocessor cache controllers; Scalable parallel systems; Shared memory | 1994 |
| 110 |
 |
Evans, David | Graphical man/machine communications: December 1971 | Semi-Annual Technical Report for period 1 June 1971 to 31 December 1971. This document includes a summary of research activities and facilities at the University of Utah under Contract F30602-70-C-0300. Information conveys important research milestones attained during this period by each of the f... | Man/machine communications; Computing systems; Digital waveform processing | 1971-12 |
| 111 |
 |
Balasubramonian, Rajeev | Integrating adaptive on-chip storage structures for reduced dynamic power | Energy efficiency in microarchitectures has become a necessity. Significant dynamic energy savings can be realized for adaptive storage structures such as caches, issue queues, and register files by disabling unnecessary storage resources. Prior studies have analyzed individual structures and their... | Microarchitecture | 2002 |
| 112 |
 |
Balasubramonian, Rajeev | Scalable, reliable, power-efficient communication for hardware transactional memory | In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true for a large-scale distributed memory system where multiple transactions may attempt to commit simultaneously and co-ordin... | Hardware; Transactional memory; Communication | 2008 |
| 113 |
 |
Yang, Yue; Gopalakrishnan, Ganesh; Lindstrom, Gary E. | A generic operational memory model specification framework for multithreaded program verification | Given the complicated nature of modern architectural and language level memory model designs, it is vital to have a systematic ap- proach for specifying memory consistency requirements that can support verification and promote understanding. In this paper, we develop a spec- ification methodolog... | Multithreaded program verification | 2003 |
| 114 |
 |
Sobh, Tarek M. | A graphical environment and applications for discrete event and hybrid systems in robotics and automation | In this paper we present an overview for the development of a graphical environment for simulating, analyzing, synthesizing, monitoring, and controlling complex discrete event and hybrid systems within the robotics, automation, and intelligent system domain. We start by presenting an overview of di... | Intelligent system domain; Graphical environment | 1994 |
| 115 |
 |
Seeley, Donn | A tour of the worm | On the evening of November 2, 1988, a self-replicating program was released upon the Internet 1. This program (a worm) invaded VAX and Sun-3 computers running versions of Berkeley UNIX, and used their sources to attack still more computers2. Within the space of hours this program had spread aacross ... | Computer worm | 1989 |
| 116 |
 |
Bruderlin, Beat | DI - An object-oriented user interface toolbox for modula-2 applications | The DI dialog interface tool library for Modula-2 applications described in this paper facilitates the design and implementation of graphical, object-oriented user interfaces for workstations with a graphical screen, a mouse and a keyboard. Much emphasis is put on the portability of the application... | DI dialog interface tool | 1990 |
| 117 |
 |
Silva, Claudio T. | ISP: An optimal out-of-core image-set processing streaming architecture for parallel heterogeneous systems | Image population analysis is the class of statistical methods that plays a central role in understanding the development, evolution, and disease of a population. However, these techniques often require excessive computational power and memory that are compounded with a large number of volumetric inp... | | 2012-01-01 |
| 118 |
 |
Susarla, Sai R.; Carter, John | Khazana: a flexible wide area data store | Khazana is a peer-to-peer data service that supports efficient sharing and aggressive caching of mutable data across the wide area while giving clients significant control over replica divergence. Previous work on wide-area replicated services focussed on at most two of the following three proper... | Khazana; Peer-to-peer data service | 2003-10-13 |
| 119 |
 |
Susarla, Sai R.; Carter, John | Middleware support for locality-aware wide area replication | Coherent wide-area data caching can improve the scalability and responsiveness of distributed services such as wide-area file access, database and directory services, and content distribution. However, distributed services differ widely in the frequency of read/write sharing, the amount of conten... | Wide-area data caching; Distributed services | 2004-11-18 |
| 120 |
 |
Kasera, Sneha K.; Patwari, Neal | High-rate uncorrelated bit extraction for shared secret key generation from channel measurements | Secret keys can be generated and shared between two wireless nodes by measuring and encoding radio channel characteristics without ever revealing the secret key to an eavesdropper at a third location. This paper addresses bit extraction, i.e., the extraction of secret key bits from noisy radio chan... | Wireless networks; Multipath fading; Physical layer; Key generation; Secret keys; Bit extraction | 2010-01 |
| 121 |
 |
Berzins, Martin | Investigating applications portability with the Uintah DAG-based runtime system on PetaScale supercomputers | Present trends in high performance computing present formidable challenges for applications code using multicore nodes possibly with accelerators and/or co-processors and reduced memory while still attaining scalability. Software frameworks that execute machine-independent applications code using a ... | | 2013-01-01 |
| 122 |
 |
Venkatasubramanian, Suresh | Multiple target tracking with RF sensor networks | RF sensor networks are wireless networks that can localize and track people (or targets) without needing them to carry or wear any electronic device. They use the change in the received signal strength (RSS) of the links due to the movements of people to infer their locations. In this paper, we cons... | | 2014-01-01 |
| 123 |
 |
Organick, Elliott I. | Semiannual technical report transformation of ADA programs into silicon (1 Sept. 1981- 28 Feb. 1982) | This report summarizes the first six months work of the research project, "Transformation of Ada Programs into Silicon." Our project has five main objectives: 1. Develop and document elements of a transformation methodology for converting Ada programs, or program constructs, into VLSI systems which ... | ADA programs; VLSI | 1982 |
| 124 |
 |
Kirby, Robert Michael | Verifying volume rendering using discretization error analysis | We propose an approach for verification of volume rendering correctness based on an analysis of the volume rendering integral, the basis of most DVR algorithms. With respect to the most common discretization of this continuous model (Riemann summation), we make assumptions about the impact of parame... | | 2014-01-01 |
| 125 |
 |
Fujimoto, Richard M. | A shared memory algorithm and proof for the alternative construct in CSP | Communicating Sequential Processes (CSP) is a paradigm for communication and synchronization among distributed processes. The alternative construct is a key feature of CSP that allows nondeterministic selection of one among several possible communicants. Previous algorithms for this construct assume... | Shared memory algorithm; Communicating Sequential Processes; CSP | 1987 |
