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CreatorTitleDescriptionSubjectDate
26 Regehr, JohnCorrectness proofs for device drivers in embedded systemsComputer systems do not exist in isolation: they must interact with the world through I/O devices. Our work, which focuses on constrained embedded systems, provides a framework for verifying device driver software at the machine code level. We created an abstract device model that can be plugged...2010
27 Brown, Don R.The design and implementation of partnetPartNet is a federated database for providing interactive online access to mechanical parts catalogs. The data contained in the vendor's product database is exported to the federated database using a networkbased distributed database protocol. A Single coherent view of these vendor databases is pro...1995
28 Stoller, Leigh B.Message passing support in the Avalanche widgetMinimizing communication latency in message passing multiprocessing systems is critical. An emerging problem in these systems is the latency contribution costs caused by the need to percolate the message through the memory hierarchy (at both sending and receiving nodes) and the additional cost of ma...Avalanche widget; Message passing; Cache coherence; Message copying; Cache miss rates; Computer memory1996
29 Orr, Douglas B.; Mecklenburg, RobertOMOS ? An object server for program executionThe benefits of object-oriented programming are well known but popular operating systems provide very few object oriented features to users and few are im plemented using object oriented techniques themselves In this paper we discuss a mechanism for apply ing object oriented programming co...OMOS; Object server1992
30 Carter, John B.; Davis, Al; Kuramkote, Ravindra; Stoller, Leigh B.Avalanche: A communication and memory architecture for scalable parallel computingAs the gap between processor and memory speeds widens?? system designers will inevitably incorpo rate increasingly deep memory hierarchies to maintain the balance between processor and memory system performance At the same time?? most communication subsystems are permitted access only to main m...Avalanche; Communication architecture; Memory architecture1995
31 Balasubramonian, RajeevLeveraging 3D technology for improved reliabilityAggressive technology scaling over the years has helped improve processor performance but has caused a reduction in processor reliability. Shrinking transistor sizes and lower supply voltages have increased the vulnerability of computer systems towards transient faults. An increase in within-die an...Reliability; Redundant multi-threading, 3D die-stacking; Parameter variation; Soft errors; Dynamic timing errors; Power-efficient microarchitecture; On-chip temperature2007-12
32 Balasubramonian, RajeevPower-efficient approaches to reliabilityRadiation-induced soft errors (transient faults) in computer systems have increased significantly over the last few years and are expected to increase even more as we move towards smaller transistor sizes and lower supply voltages. Fault detection and recovery can be achieved through redundancy. St...Radiation-induced; Soft errors; Transient faults; Redundant thread; Trailing thread; Power consumption2005
33 Brunvand, Erik L.Translating concurrent programs into delay-insensitive circuitsPrograms written in a subset of occam are automatically translated into delay-insensitive circuits using syntax-directed techniques. The resulting circuits are improved using semantics-preserving circuit-to-circuit transformations. Since each step of the translation process can be proven correct, th...1989
34 Brunvand, Erik L.A case for increased operating system support in chip multi-processorsWe identify the operating system as one area where a novel architecture could significantly improve on current chip multi-processor designs, allowing increased performance and improved power efficiency. We first show that the operating system contributes a non-trivial overhead to even the most com...2005
35 Balasubramonian, RajeevA case for increased operating system support in chip multi-processorsWe identify the operating system as one area where a novel architecture could significantly improve on current chip multi-processor designs, allowing increased performance and improved power efficiency. We first show that the operating system contributes a non-trivial overhead to even the most com...2005
36 Stoller, Leigh B.Low latency workstation cluster communications using sender-based protocolsThe use of workstations on a local area network to form scalable multicomputers has become quite common. A serious performance bottleneck in such "carpet clusters" is the communication protocol that is used to send data between nodes. We report on the design and implementation of a class of communic...Workstations; Scalable multicomputers; Sender-based; Communication protocols1996
37 Zhang, LixinReference manual of impulse system callsThis document describes the Im pulse system calls. The Impulse system calls allow user applications to use remapping functionality provided by the Impulse Adaptive Memory System to remap their data structures. Impulse supports several remapping algorithms. User applications choose the desired remapp...Impulse system calls; Remapping functionality; Impulse Adaptive Memory System; Remapping algorithms1999
38 Hibler, Michael J.Interface and execution models in the fluke kernelWe have defined and implemented a new kernel API that makes every exported operation either fully interruptible and restartable, thereby appearing atomic to the user. To achieve interruptibility, all possible states in which a thread may become blocked for a "long" time are completely representable ...Fluke kernel; Interruptibility1998
39 Balasubramonian, RajeevPower efficient approaches to redundant multithreadingNoise and radiation-induced soft errors (transient faults) in computer systems have increased significantly over the last few years and are expected to increase even more as we move toward smaller transistor sizes and lower supply voltages. Fault detection and recovery can be achieved through redund...Reliability; Power; Transient faults; Soft errors; Redundant multithreading (RMT); Heterogeneous chip multiprocessors dynamic frequency scaling2007-08
40 Susarla, Sai R.; Carter, JohnFlexible consistency for wide area peer replicationThe lack of a flexible consistency management solution hinders P2P implementation of applications involving updates, such as read-write file sharing, directory services, online auctions and wide area collaboration. Managing mutable shared data in a P2P setting requires a consistency solution that...Wide area; Peer replication2004-11-18
41 Brunvand, Erik L. ; Gopalakrishnan, GaneshHigh-level asynchronous system design using the ACK frameworkDesigning asynchronous circuits is becoming easier as a number of design styles are making the transition from research projects to real, usable tools. However, designing asynchronous "systems" is still a difficult problem. We define asynchronous systems to be medium to large digital systems whose...2000
42 Khan, Faisal HabibCommercial and industrial applications getting ready for direct-current power distributionThis paper describes design trends in several classes of power-electronic appliances that will increase the appeal for distributing dc power in buildings. In the commercial sector information technology (IT) power conversion architectures are moving from multi- to single-voltage supplies, initially...Direct current power distribution; Commercial applications2004-01-01
43 Furse, Cynthia M.Down to the wireAs today's military and commercial aircraft age past their teen years, the many kilometers of wiring buried deep within their structures begin to crack and fray. Once thought to be rare and benign, such faults are found by the hundreds in a typical aircraft. Unlike obvious cracks in a wing or an e...Aging wiring; Wire fault location; Aging wire detection; Smart wire systems2001-01-01
44 Johnson, Christopher R.Grid-enabling problem solving environments: a case study of SCIRun and NetSolveCombining the functionality of NetSolve, a grid-based middleware solution, with SCIRun, a graphically-based problem solving environment (PSE), yields a platform for creating and executing grid-enabled applications. Using this integrated system, hardware and/or software resources not previously ac...Grid computing; SCIRun; NetSolve; Problem solving environment; Numerical libraries; Parallel programming (Computer science)2001
45 Hibler, Michael J.The flask security architecture: system support for diverse security policiesOperating systems must be flexible in their support for security policies, i.e., the operating system must provide sufficient mechanisms for supporting the wide variety of real-world security policies. Systems claiming to provide this support have failed to do so in two ways: they either fail to pro...Flask; Security architecture1998
46 Organick, Elliott I.CASL - A language for automating the implementation of computer architecturesThe computer Architecture Specification Language (CASL), described in this paper, is intended for use by computer architects CASL is a state machine description language especially useful for describing digital systems at the "register transfer" level and designed to meet the needs of the computer a...Computer Architecture Specification Language1979
47 Balasubramonian, RajeevEnergy-efficient processor design using multiple clock domains with dynamic voltage and frequency scalingAs clock frequency increases and feature size decreases, clock distribution and wire delays present a growing challenge to the designers of singly-clocked, globally synchronous systems. We describe an alternative approach, which we call a Multiple Clock Domain (MCD) processor in which the chip is d...Multiple clock domains; Synchronization; Microarchitecture2002
48 Panangaden, PrakashAbstract interpretation and indeterminacyWe present a semantic theory that allows us to discuss the semantics of indeterminate operators in a dataflow network. The assumption is made that the language in which the indeterminate operators are written has a construct that allows for the testing of availability of data on input lines. We then...Semantics; Indeterminate operators1984
49 Stevens, KennethAn A-FPGA architecture for relative timing based asynchronous designsThis paper presents an asynchronous FPGA architecture that is capable of implementing relative timing based asynchronous designs. The architecture uses the Xilinx 7-Series architecture as a starting point and proposes modifications that would make it asynchronous design capable while keeping it full...2014-01-01
50 Evans, DavidGraphical man/machine communications: June 1971Semi-Annual Technical Report for period 1 January 1971 to 31 May 1971. This document includes a summary of research activities and facilities at the University of Utah under Contract F30602-70-C-0300. Information conveys important research milestones attained during this period by each of the fo...Curved surfaces; Digital waveform processing1971
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