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![]() | Akella, Venkatesh | Testing two-phase transition signaling based self-timed circuits in a synthesis environment | The problem of testing self-timed circuits generated by an automatic synthesis system is studied. Two-phase transition signalling is assumed and the circuits are targetted for an asynchronous macromodule based implementation as in [?, ?, ?, ?]. The partitioning of the circuits into control blocks, ... | Testing; two-phase; transition signaling; self-timed circuits | 1993 |