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Filters: Format: "application/pdf" Collection: "ir_uspace" Subject: "Non-uniform cache architectures (NUCA)"
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CreatorTitleDescriptionSubjectDate
1 Balasubramonian, RajeevArchitecting efficient interconnects for large caches with CACTI 6.0Efficiently executing multithreaded applications on future multicores will require fast intercore communication. Most of this communication happens via reads and writes to large shared caches in the memory hierarchy. Microprocessor performance and power will be strongly influenced by the long inter...Interconnects; CACTI 6.0; Non-uniform cache architectures (NUCA)2008-01
2 Balasubramonian, RajeevDynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large cachesIn future multi-cores, large amounts of delay and power will be spent accessing data in large L2/L3 caches. It has been recently shown that OS-based page coloring allows a non-uniform cache architecture (NUCA) to provide low latencies and not be hindered by complex data search mechanisms. In this ...Page coloring; Shadow-memory addresses; Cache capacity allocation; Data/page migration; Last level caches; Non-uniform cache architectures (NUCA)2009-02
3 Balasubramonian, RajeevOptimizing NUCA organizations and wiring alternatives for large caches with CACTI 6.0A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, and thermal management strategies. There are a number of interconnect design considerations that influence power/performanc...CACTI 6.0; Non-uniform cache architectures (NUCA); Cache models; Memory hierarchies; On-chip interconnects2007-12
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