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| Creator | Title | Description | Subject | Date | ||
|---|---|---|---|---|---|---|
| 1 |
 | Balasubramonian, Rajeev | Dynamically allocating processor resources between nearby and distant ILP | Modern superscalar processors use wide instruction issue widths and out-of-order execution in order to increase instruction-level parallelism (ILP). Because instructions must be committed in order so as to guarantee precise exceptions, increasing ILP implies increasing the sizes of structures s... | Instruction-level parallelism; Microarchitecture; Primary thread; Future thread; Instruction reuse buffer | 2001 |
| 2 |
 | Balasubramonian, Rajeev | Reducing the complexity of the register file in dynamic superscalar processors | Dynamic superscalar processors execute multiple instructions out-of-order by looking for independent operations within a large window. The number of physical registers within the processor has a direct impact on the size of this window as most in-flight instructions require a new physical register a... | Dynamic superscalar processors; Register file; Instruction-level parallelism; Microarchitecture; Reorder buffer | 2001 |
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