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Filters: Format: "application/pdf" Collection: "ir_uspace" Subject: "Cache coherence"
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CreatorTitleDescriptionSubjectDate
1 Balasubramonian, RajeevLeveraging wire properties at the microarchitecture levelIn future microprocessors, communication will emerge as a major bottleneck. The authors advocate composing future interconnects of some wires that minimize latency, some that maximize bandwidth, and some that minimize power. A microarchitecture aware of these wire characteristics can steer on-chip ...Microarchitecture; Interconnects; Cache coherence2006-11
2 Stoller, Leigh B.Message passing support in the Avalanche widgetMinimizing communication latency in message passing multiprocessing systems is critical. An emerging problem in these systems is the latency contribution costs caused by the need to percolate the message through the memory hierarchy (at both sending and receiving nodes) and the additional cost of ma...Avalanche widget; Message passing; Cache coherence; Message copying; Cache miss rates; Computer memory1996
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