UScholar Works
 
Filters: Department: "School of Computing" Collection: "ir_uspace"
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CreatorTitleDescriptionSubjectDate
1 Zhang, LixinA DRAM backend for the impulse memory systemThe Impulse Adaptable Memory System exposes DRAM access patterns not seen in conventional memory systems. For instance, it can generate 32 DRAM accesses each of which requests a four-byte word in 32 cycles. Conventional DRAM backends are optimized for accesses that request full cache lines. They m...Impulse Adaptable Memory System; DRAM1998-12-16
2 Brunvand, Erik L.A case for increased operating system support in chip multi-processorsWe identify the operating system as one area where a novel architecture could significantly improve on current chip multi-processor designs, allowing increased performance and improved power efficiency. We first show that the operating system contributes a non-trivial overhead to even the most com...2005
3 Balasubramonian, RajeevA case for increased operating system support in chip multi-processorsWe identify the operating system as one area where a novel architecture could significantly improve on current chip multi-processor designs, allowing increased performance and improved power efficiency. We first show that the operating system contributes a non-trivial overhead to even the most com...2005
4 Carter, JohnA collective approach to harness idle resourcesWe propose a collective approach for harnessing the idle resources (cpu, storage, and bandwidth) of nodes (e.g., home desktops) distributed across the Internet. Instead of a purely peer-to-peer (P2P) approach, we organize participating nodes to act collectively using collective managers (CMs). Pa...Idle resources; Computer nodes2008
5 Mathew, Binu K.; Davis, AlA characterization of visual feature recognitionNatural human interfaces are a key to realizing the dream of ubiquitous computing. This implies that embedded systems must be capable of sophisticated perception tasks. This paper analyzes the nature of a visual feature recognition workload. Visual feature recognition is a key component of a numb...Visual feature recognition; Human interfaces2003-09-03
6 Gopalakrishnan, GaneshA correctness criterion for asynchronous circuit validation and optimizationWe propose a new relation C. called strong conformance in the context of Dill's trace theory, and define B Q A to be true exactly when B conforms to A and the success set of B contains the success set of A. When B C. A, module B operated in module A's maximal environment AM (i.e. B || AM) exhibits a...Validation; Optimization1992
7 Brunvand, Erik L.A correctness criterion for asynchronous circuit validation and optimizationIn order to reason about the correctness of asynchronous circuit implementations and specifications, Dill has developed a variant of trace theory [1]. Trace theory describes the behavior of an asynchronous circuit by representing its possible executions as strings called "traces" A useful relatio...Asynchronous circuits; Circuit optimizations; Formal verification of hardware; Trace theory; Asynchronous circuit validation1992
8 Brunvand, Erik L.A cell set for self-timed design using actel FPGAsAsynchronous or self-timed systems that do not rely on a global clock to keep system components synchronized can offer significant advantages over traditional clocked circuits in a variety of applications. However, these systems require that suitable self-timed circuit primitives are available for b...Self-timed systems; Actel field programmable gate arrays; FPGA1991
9 Gopalakrishnan, GaneshA compositional model for synchronous VLSI systemsCurrently available hardware specification languages have two serious deficiencies: (i) inadequate protocol definition capabilities; (ii) lack of a compositional model. We now explain these in more detail.Very large scale integration; VLSI systems1987
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