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CreatorTitleDescriptionSubjectDate
1 Gopalakrishnan, GaneshVerification of regular arrays by symbolic simulationMany algorithms have an efficient hardware formulation as a regular array of cells, which can be implemented in VLSI as regular circuit structures. Bit-sliced microprocessors, pattern matching circuits, associative cache memories, Hue-grain systolic arrays, and embedded memory-with-logic structure...Verification; regular arrays; symbolic simulation1991
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