Creator | Title | Description | Subject | Date | ||
---|---|---|---|---|---|---|
1 |
![]() | Balasubramonian, Rajeev | Dynamic memory hierarchy performance optimization | Although microprocessor performance continues to increase at a rapid pace, the growing processor-memory speed gap threatens to limit future performance gains. In this paper, we propose a novel configurable cache and TLB as an alternative to conventional two-level hierarchies. This organization le... | Microprocessor performance; Processor-memory speed gap | 2000 |