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 | Balasubramonian, Rajeev | Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches | In future multi-cores, large amounts of delay and power will be spent accessing data in large L2/L3 caches. It has been recently shown that OS-based page coloring allows a non-uniform cache architecture (NUCA) to provide low latencies and not be hindered by complex data search mechanisms. In this ... | Page coloring; Shadow-memory addresses; Cache capacity allocation; Data/page migration; Last level caches; Non-uniform cache architectures (NUCA) | 2009-02 |