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157
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157
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Honors Theses Open Access
4
Theses & Dissertations
85
UScholar Works
68
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Title
Date
Type
Setname
1
Cell library for automatic synthesis of analog error control decoders
2002
Text
ir_uspace
2
Technology mapping of timed circuits
1995
Text
ir_uspace
3
Cell library for automatic synthesis of analog error control decoders
2002
Text
ir_uspace
4
Design of an inexpensive take-home recorder for cardiac monitoring.
1974-07
Text
ir_etd
5
Radiation hardening by design of asynchronous logic for hostile environments
2009
Text
ir_uspace
6
Asynchronous genetic circuit design
2019
Text
ir_etd
7
Algorithms and methodology to design asynchronous circuits using synchronous CAD tools and flows
2013-12
Text
ir_etd
8
Automatic addition of reset in asynchronous sequential control circuits
2014-01-01
Text
ir_uspace
9
A mathematical approach to a low power FFT architecture
1998
Text
ir_uspace
10
A single chip low power asynchronous implementation of an FFT algorithm for space applications
1998
Text
ir_uspace
11
Algorithms for MIS vector generation and pruning
2006
Text
ir_uspace
12
Dynamic gates with hysteresis and configurable noise tolerance
2007
Text
ir_uspace
13
Teaching and learning combined (TLC)
2003
Text
ir_uspace
14
Characterization of asynchronous templates for integration into clocked CAD flows
2009
Text
ir_uspace
15
Comparing energy and latency of asynchronous and synchronous NoCs for embedded SoCs
2010
Text
ir_uspace
16
Architectural synthesis of timed asynchronous systems
1999
Text
ir_uspace
17
Efficient verification of hazard-freedom in gate-level timed asynchronous circuits
2007
Text
ir_uspace
18
Reciprocal square root circuit design: a comparison of custom and automated design methodologies
2009-05
Text
ir_etd
19
Clocked and asynchronous FIFO characterization and comparison
2009
Text
ir_uspace
20
Total ionizing dose characterization of a commercially fabricated asynchronous FFT for space applications
2000
Text
ir_uspace
21
Biologically inspired analog IC for visual collision detection
2005-11
Text
ir_uspace
22
Performance analysis of four-phase untimed asynchronous handshake protocols
2009-02-26
Text
ir_etd
23
Symbolic asynchronous hardware protocol verification for compositions with relative timing
2010
Text
ir_etd
24
Computational framework for ultrastructural mapping of neural circuitry
2009
Text
ir_uspace
25
Design and implementation of clocked open core protocol interfaces for intellectual property cores and on-chip network fabric
2011-05
Text
ir_etd
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