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CreatorTitleDescriptionSubjectDate
501 Stringfellow, Gerald B.Surfactant controlled growth of GaInP by organometallic vapor phase epitaxyThe effect of the surfactant Sb has been studied for GaInP semiconductor alloys grown by organometallic vapor phase epitaxy. Dramatic changes in the optical and electrical properties of GaInP with CuPt ordering have been observed. A small concentration of triethylantimony TESb in the vapor is fou...Semiconductors; Surface active agents2000
502 Stringfellow, Gerald B.; Shurtleff, James KevinSurfactant effects on doping of GaAs grown by organometallic vapor phase epitaxyRecently, the addition of the isoelectronic surfactant Sb during organometallic vapor phase epitaxy (OMVPE) of GaInP was shown to eliminate ordering, resulting in a significant change in the band gap energy. These results suggest that surfactants added during growth could have profound affects on ot...Gallium arsenide; Surfactants; Semiconductors2001
503 Harrison, Reid R.Sweep strategies for a sensory-driven, behavior-based vacuum cleaning agentIn the Machine Intelligence Laboratory, University of Florida, we have built a small autonomous robot and programmietd to exhibit various reactive behaviors.T he robot, namedG ator,p erformsa rea coveragein an interior room by combining distinct behaviors. Gator has 26 sensors of which only 7 are...Sweeping behavior; Claustrophobia1993-01-01
504 Khan, Faisal HabibSwitching cells and their implications for power electronic circuitsThis paper will introduce two basic switching cells, P-cell and N-cell, along with their implications and applications in power electronic circuits. The concept of switching cells in power electronic circuits started in the late 1970's. The basic cells presented in this paper have one switching ele...2009-05
505 Myers, Chris J.Symbolic model checking of analog/mixed-signal circuits*Abstract- This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware description language for AMS circuits. The VHDLAMS description is compiled into labeled hybrid Petri nets (LHPN...2007
506 Stevens, KennethSymbolic verification of timed asynchronous hardware protocolsCorrect interaction of asynchronous protocols re- quires verification. Timed asynchronous protocols add another layer of complexity to the verification challenge. A methodology and automated tool flow have been developed for verifying systems of timed asynchronous circuits through compositional mode...2013-01-01
507 Stevens, KennethSynchronous elasticization: considerations for correct implementation and miniMIPS case studyLatency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elasticization is one approach (among others) of transforming an ordinary clocked circuit into a latency insensitive design. Th...2010
508 Myers, Chris J.Synchronous interlocked pipelinesIn a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease, locality principles are becoming paramount in controlling advancement of data through pipelined systems. Achieving fine...2002
509 Stevens, KennethSynthesis of asynchronous control circuits with automatically generated relative timing assumptionsThis paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ensure functionality. Relative timing assumptions in the form "event a occurs before event b" can be used to remove redundan...1999
510 Myers, Chris J.Synthesis of speed independent circuits based on decompositionThis paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesizes each output individually. It begins by contracting the STG to include only transitions on the output of interest and ...2004
511 Myers, Chris J.Synthesis of timed asynchronous circuitsIn this paper we present a systematic procedure to synthesize timed asynchronous circuits using timing constraints dictated by system integration, thereby facilitating natural interaction between synchronous and asynchronous circuits. In addition, our timed circuits also tend to be more &dent, in b...1993
512 Myers, Chris J.Synthesis of timed asynchronous circuitsAbstract-In this paper we present a systematic procedure to synthesize timed asynchronous circuits using timing constraints dictated by system integration, thereby facilitating natural interaction between synchronous and asynchronous circuits. In addition, our timed circuits also tend to be more & d...1993
513 Myers, Chris J.Synthesis of timed circuits based on decompositionAbstract-This paper presents a decomposition-based method for timed circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesizes each output individually. It begins by contracting the timed signal transition graph (STG) to include only transi...2007
514 Myers, Chris J.Synthesis of timed circuits using BDDs*This paper presents a tool which synthesizes timed circuits from reduced state graphs. Using timing information to reduce state graphs can lead to significantly smaller and faster circuits. The tool uses implicit techniques (binary decision diagrams) to represent these graphs. This allows us to synt...1997
515 Furse, Cynthia M.System level analysis of noise and interference analysis for a MIMO systemMultiple input multiple output antenna communication system are gaining importance in the field of communication and ad-hoc networks due to increase demand for wireless throughput in band-limited channels. A system analysis is not complete without accounting for the system level noise and interfer...2008-07
516 Furse, Cynthia M.Take a Stand: Speaking about RF SafetyTell your students at the beginning of the semester that they need to prepare a speech and deliver it before an off-campus audience, and they will not exactly be leaping out of their seats with joy. Remind them a week in advance that their speech is coming up, and you will inevitably have a student ...Radio frequency safety; RF safety2004-12
517 Furse, Cynthia M.Take a stand: speaking about RF safetyTell your students at the beginning of the semester that they need to prepare a speech and deliver it before an off-campus audience, and they will not exactly be leaping out of their seats with joy. Remind them a week in advance that their speech is coming up, and you will inevitably have a student ...2004-12
518 Stringfellow, Gerald B.Te doping of GaInP: ordering and step structureThe donor Te has been added to GaInP during organometallic vapor phase epitaxial growth using the precursor diethyltelluride. In agreement with previous studies, the addition of high Te concentrations leads to the elimination of the CuPt ordering observed in undoped layers. The degree of order is es...Epitaxial growth; Heterostructures; Growth parameters1999-04-01
519 Furse, Cynthia M.Teaching and learning combined (TLC)Most professors have to lean a LOT. Every day, it seems, there IS something that we need that we don't know. So what do you do to lean this new information? Perhaps you hit the Web or the library, find a tutorial, a textbook, or a paper, and give it a little reading time in between a 12:00 class an...2003
520 Mathews, V. JohnTechniques for bilinear time series analysisThis paper reviews the general problem of nonlinear time series analysis. The special case of bilinear time series analysis is discussed in detail. The stability of the estimated nonlinear system models is of particular importance. We discuss a simple sufficient condition for the stability of s...1993
521 Myers, Chris J.Technology mapping of timed circuitsAbstract This paper presents an automated procedure for the technology mapping of timed circuits to practical gate libraries. Timed circuits are a class of asynchronous circuits that incorporate explicit timing information in the specification which is used throughout the design process to optimi...1995
522 Stringfellow, Gerald B.Tertiarybutyldimethylantimony: a new Sb source for low temperature organometallic vapor phase epitaxial growth of InSbThis article investigates tertiarybutyldimethylantimony as a source for low-temperature organometallic vapor phase epitaxial growth of indium antimonide (InSB); extraction of good surface morphology InSb layers; efficiency of InSB growth; and, presence of a negligible parasitic reaction between trim...Tertiarybutyldimethylantimony; Indium antimonide crystals1992
523 Stevens, KennethTesting the consequences of specifications in modal µIn a companion paper in these proceedings [6], we introduced the CCS notation and explained how to write specifications succinctly in CCS using the composition operator. In this paper we explain how one may associate a process logic with CCS and use it to resolve deadlock, safety, liveness, and fai...1993
524 Stringfellow, Gerald B.Thermodynamic aspects of organometallic VPEOrganometallic vapor phase epitaxy (OMVPE) is a new crystal growth technique which is rapidly gaining popularity due to its simplicity, flexibility and proven ability to grow excellent quality III/V compounds and alloys for device applications.Organometallic vapor phase epitaxy; Thermodynamics1982
525 Tasdizen, TolgaThree-dimensional alignment and merging of confocal microscopy stacksWe describe an efficient, robust, automated method for image alignment and merging of translated, rotated and flipped confocal microscopy stacks. The samples are captured in both directions (top and bottom) to increase the SNR of the individual slices. We identify the overlapping region of the two s...2013-01-01
501 - 525 of 577