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Creator | Title | Description | Subject | Date |
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Henderson, Thomas C. | Target localization and autonomous navigation using wireless sensor networks -a pseudogradient algorithm approach | Autonomous mobile robots (AMRs) operating in unknown environments face twin challenges: 1) localization and 2) efficient directed navigation. This paper describes a two-tiered approach to solving these challenges: 1) by developing novel wireless-sensor-network (WSN)-based localization methods and 2)... | | 2014-01-01 |
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Boll, Steven F. | Noise suppression methods for robust speech processing (1 Oct. 1976 - 31 March 1977) | To develop robust speech processes, based upon the integration of digital noise suppression methods and narrow band speech analysis-synthesis methods, capable of realizing practical, real time methods for effectively processing speech recorded in practical operating environments. | Digital noise suppression | 1977 |
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Gopalakrishnan, Ganesh; Henderson, Thomas C. | Modeling and verification of distributed control scheme for mobile robots | In this report we present a sensor-based distributed control scheme for mobile robots. This scheme combines centralized and decentralized control strategies. Each group of sensors is considered to be a process that performs sensing and carries out local control tasks as well. Besides these processes... | Distributed control scheme; Sensor-based | 1995 |
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Kasera, Sneha K. | Violating privacy through walls by passive monitoring of radio windows | We investigate the ability of an attacker to passively use an otherwise secure wireless network to detect moving people through walls. We call this attack on privacy of people a "monitoring radio windows" (MRW) attack. We design and implement the MRW attack methodology to reliably detect when a pers... | | 2014-01-01 |
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Balasubramonian, Rajeev | Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures | Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper we propose a cache and TLB layout and design that leverages repeater insertion to provide dynamic low-cost configurability trading of size and speed on a per application ... | Translation lookaside buffer (TLB) | 2000 |
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Davis, Al | An introduction to asynchronous circuit design | The purpose of this monograph is to provide both an introduction to field of asynchronous digital circuit design and an overview of the practical state of the art in 1997. In the early days of digital circuit design, little distinction was made between synchronous and asynchronous circuits. However,... | Asynchronous circuit design | 1997 |
7 |
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Balasubramonian, Rajeev | Dynamically tunable memory hierarchy | The widespread use of repeaters in long wires creates the possibility of dynamically sizing regular on-chip structures. We present a tunable cache and translation lookaside buffer (TLB) hierarchy that leverages repeater insertion to dynamically trade off size for speed and power consumption on a per... | Microarchitecture; High performance microprocessors; Reconfigurable architectures; Energy and performance of on-chip caches; Translation lookaside buffer (TLB); Tunable cache | 2003-10 |
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Miller, Neil Joseph | Removal of noise from a voice signal by synthesis | This report describes research into the problem of rectification of sound recordings made under adverse conditions and communicated and recorded with a great deal of noise. In the course of this research, a number of refinements have been made to the process of digital speech synthesis through new v... | Rectification; Homomorphic vocoder; Digital speech synthesis; Filtering device | 1974 |