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CreatorTitleDescriptionSubjectDate
1 Lindstrom, Gary E.The design of object-oriented meta-architectures for programming languagesThis paper is a survey of the design of four object-oriented meta-level architectures for programming languages. We present overviews and compare the salient features of the meta-architectures of Smalltalk, Common Lisp Object System (CLOS), a Scheme Compiler, and Etyma, our framework for modular sy...Meta-level architectures; Design1994
2 Gu, JunAn optimal, parallel discrete relaxation algorithm and architecture (Revised January 1988 and August 1989)A variety of problems in artificial intelligence, operations research, symbolic logic, pattern recognition and computer vision, and robot manipulation are special cases of the Consistent Labeling Problem (CLP). The Discrete Relaxation Algorithm (DRA) is an efficient computational technique to enfor...Consistent Labeling Problem; CLP; Discrete Relaxation Algorithm; DRA1988
3 Kuramkote, Ravindra; Carter, JohnExploring the value of supporting multiple DSM protocols in Hardware DSM ControllersThe performance of a hardware distributed shared memory (DSM) system is largely dependent on its architect's ability to reduce the number of remote memory misses that occur. Previous attempts to solve this problem have included measures such as supporting both the CC-NUMA and S-COMA architectures is...DSM; Controllers1999
4 Brunvand, Erik L.; Smith, Kent F.Self-timed design in GaAs - case study of a high-speed parallel multiplierAbstract-The problems with synchronous designs at high clock frequencies have been well documented. This makes an asynchronous approach attractive for high speed technologies like GaAs. We investigate the issues involved by describing the design of a parallel multiplier that can be part of a floati...1996
5 Jacobson, HansDesign and validation of a simultaneous multi-threaded DLX processorModern day computer systems rely on two forms of parallelism to achieve high performance, parallelism between individual instructions of a program (ILP) and parallelism between individual threads (TLP). Superscalar processors exploit ILP by issuing several instructions per clock, and multiprocessors...DLX processor; Validation1999
6 Michell, NickOn the potential of asynchronous pipelined processorsAn asynchronous version of the pipelined R3000 and DLX processors, the A3000, is being designed. Simulation was employed t o investigate the potential speed-up obtainable due t o the asynchronous operation. Preliminary results show up to a 64% improvement in performance.Pipelined processors; Pipelined R3000; DLX processors; A30001990
7 Davis, A.L.The architecture of DDMl: a recursively structured data driven machineAn architecture for a highly modular, recursively structured class of machines is presented. DDMl is an instance of such a machine structure, and is capable of executing machine language programs which are data driven (data flow) nets. These nets may represent arbitrary amounts of concurrency as wel...DDMl; machine structure; machine language programs1977
8 Carter, John B.Design alternatives for shared memory multiprocessorsIn this paper. we consider the design alternatives available for building the next generation DSM machine (e.g., the choice of memory architecture, network technology, and amount and location of per-node remote data cache). To investigate this design space, we have simulated six applications on a wi...Shared memory multiprocessors1998
9 Balasubramonian, RajeevExploring the design space for 3D clustered architectures3D die-stacked chips are emerging as intriguing prospects for the future because of their ability to reduce on-chip wire delays and power consumption. However, they will likely cause an increase in chip operating temperature, which is already a major bottleneck in modern microprocessor design. We...2006
10 Sudan, KshitijUnderstanding the behavior of Pthread applications on non-uniform cache architecturesWhy is it important? As number of cores in a processor scale up, caches would become banked Keeps individual look-up time small. Allows parallel accesses by different cores. Present shared programming model assumes a flat memory. Unaware application can have sub-optimal performance Conclusion ...Computer architecture, compiler analysis, NUCA caches2011-10-08
11 Riloff, Ellen M.Recognizing and organizing opinions expressed in the world pressTomorrow's question answering systems will need to have the ability to process information about beliefs, opinions, and evaluations-the perspective of an agent. Answers to many simple factual questions-even yes/no questions-are affected by the perspective of the information source. For example...Opinions; Opinion recognition; World press; MPQA project; Multiple perspectives2003
12 Parker, Steven G.Survey of the Itanium architecture from a programmer's perspectiveThe Itanium family of processors represents Intel;s foray into the world of Explicitly Parallel Instruction Computing and 64-bit system design. This survey contains an introduction to the Itanium architecture and instruction set, as well as some of the available implementations. Taking a programmer'...Itanium; Instruction sets2003
13 Brunvand, Erik L.Fred: an architecture for a self-timed decoupled computerDecoupled computer architectures provide an effective means of exploiting instruction level parallelism. Selftimed micropipeline systems are inherently decoupled due to the elastic nature of the basic FIFO structure, and may be ideally suited for constructing decoupled computer architectures. Fred ...1996
14 Carter, John B.; Davis, Al; Kuramkote, Ravindra; Stoller, Leigh B.Avalanche: A communication and memory architecture for scalable parallel computingAs the gap between processor and memory speeds widens?? system designers will inevitably incorpo rate increasingly deep memory hierarchies to maintain the balance between processor and memory system performance At the same time?? most communication subsystems are permitted access only to main m...Avalanche; Communication architecture; Memory architecture1995
15 Richardson, William F.Fred: an architecture for a self-timed decoupled computerDecoupled computer architectures provide an effective means of exploiting instruction level parallelism. Self-timed micropipeline systems are inherently decoupled due to the elastic nature of the basic FIFO structure, and may be ideally suited for constructing decoupled computer architectures. Fred ...Decoupled computer; Fred1995
16 Henderson, Thomas C.An O(n) time discrete relaxation architecture for real-time processing of the consistent labeling problemDiscrete relaxation techniques have proven useful in solving a wide range of problems in digital signal and digital image processing, artificial intelligence, operations research, and machine vision. Much work has been devoted to finding efficient hardware architectures. This paper shows that a conv...Discrete relaxation techniques1986
17 Keller, Robert M.; Lindstrom, Gary E.An architecture for a loosely-coupled parallel processorAn architecture for a large (e. g. 1000 processor) parallel computer is presented. The processors are loosely-coupled, in the sense that communication among them is fully asynchronous, and each processor is generally not unduly delayed by any immediate need for specific data values. The network supp...Loosely-coupled; Parallel processors1978
18 Brunvand, Erik L.Editorial asynchronous architectureAsynchronous design is enjoying a worldwide resurgence of interest following several decades in obscurity. Many of the early computers employed asynchronous design techniques, but since the mid 1970s almost all digital design has been based around the use of a central clock. The clock simplifies mos...1996-01-01
19 Davis, AlAutomating the design of embedded domain specific acceleratorsDomain specific architecture (DSA) design currently involves a lengthy process that requires significant designer knowledge, experience, and time in arriving at a suitable code generator and architecture for the target application suite. Given the stringent time to market constraints and the dyna...Domain specific architecture; Stall cycle analysis; SCA; Domain specific accelerators2008
20 Carter, John B.AS-COMA: An adaptive hybrid shared memory ArchitectureScalable shared memory multiprocessors traditionally use either a cache coherent nonuniform memory access (CC-NUMA) or simple cache-only memory architecture (S-COMA) memory architecture. Recently, hybrid architectures that combine aspects of both CC-NUMA and S-COMA have emerged. In this paper, we pr...AS-COMA; Hybrid shared memory1998
21 Fujimoto, Richard M.On synthesizing systolic arrays from recurrence equations with linear dependenciesWe present a technique for synthesizing systolic architectures from Recurrence Equations. A class of such equations (Recurrence Equations with Linear Dependencies) is defined and and the problem of mapping such equations onto a two dimensional architecture is studied. We show that such a mapping is ...Recurrence equations1986
22 Kumar, Sidharth; Pascucci, ValerioRemote visualizationGeneralized Architecture and pipeline for a remote site
23 Brunvand, Erik L.Precise exception handling for a self-timed processorSelf-timed systems structured as multiple concurrent processes and communicating through self-timed queues are a convenient way to implement decoupled computer architectures. Machines of this type can exploit instruction level parallelism in a natural way, and can be easily modified and extended...1995
24 Cotter, Neil E.Generality Vs. speed of convergence in the cart-pole balancerThis paper compares the speed of convergence to an optimal solution of four controllers for the problem of balancing a pole on a cart. We demonstrate that controllers whose design is tailored specifically to the cart-pole problem (i.e. less general) converge more rapidly to an optimal solution. How...Cart-pole balancer; Generality; Speed of convergence1991
25 Lindstrom, Gary E.ETYMA: a framework for modular systemsModularity, i.e. support for the flexible construction, adaptation, and combination of units of software, is an important goal in many systems. In most cases, however, systems achieve only a few aspects of modularity. The problem can be traced to the inflexibility, or the limited view of modularity ...ETYMA; Modularity; Modular systems1994
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