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CreatorTitleDescriptionSubjectDate
1 Balasubramonian, RajeevLeveraging 3D technology for improved reliabilityAggressive technology scaling over the years has helped improve processor performance but has caused a reduction in processor reliability. Shrinking transistor sizes and lower supply voltages have increased the vulnerability of computer systems towards transient faults. An increase in within-die an...Reliability; Redundant multi-threading, 3D die-stacking; Parameter variation; Soft errors; Dynamic timing errors; Power-efficient microarchitecture; On-chip temperature2007-12
2 Regehr, John; Pagariya, Rohit PannalaljiDirect equivalence testingTesting embedded software is difficult. • Further complicated by presence of memory and type safety errors in software. • Compiler contain various known bugs. Developers are skeptical to upgrade the compilers. • Is your embedded software affected by memory safety and compilation erro...
3 Chatterjee, Niladrish; Balasubramonian, Rajeev; Davis, Alan L.Rethinking DRAM design and organization for energy-constrained multicoresDRAM vendors have traditionally optimized for low cost and high performance, often making design decisions that incur energy penalties. For example, a single conventional DRAM access activates thousands of bitlines in many chips, to return a single cache line to the CPU. The other bits may be access...DRAM power consumption; Data-center power; Multicore memory; Trapeze Interactive Poster2010-03-15
4 Kirby, Robert MichaelKirby research group2012
5 Henderson, Thomas C.Received signal strength based bearing-only robot navigation in a sensor network fieldThis paper presents a low-complexity, novel approach to wireless sensor network (WSN) assisted autonomous mobile robot (AMR) navigation. The goal is to have an AMR navigate to a target location using only the information inherent to WSNs, i.e., topology of the WSN and received signal strength (RSS) ...2014-01-01
6 Evans, DavidGraphical man/machine communications: November 1966Semiannual progress report for period ending 30 November, 1966.1966-11
7 Newman, William M.An experimental display programming language for the PDP-10 computerAn experimental language for display programming, called DIAL, has been developed for the PDP-10 and the UNIVAC 1559 display. It is experimental in the sense that it was originally conceived as a means of testing out some ideas, and the best way to test them seemed to be to produce a language that ...Display programming; DIAL; Display Algol1970
8 Berzins, MartinSystematic debugging methods for large-scale HPC computational frameworksParallel computational frameworks for high-performance computing are central to the advancement of simulation-based studies in science and engineering. Finding and fixing bugs in these frameworks can be time consuming. If left unchecked, these bugs diminish the amount of new science performed. A sys...2014-01-01
9 Mahi, RobertVisible surface algorithms for quadric patchesThis paper describes two algorithms which find the visible portions of surfaces in a picture of a cluster of three-dimensional quadric patches. A quadric patch is a portion of quadric surface defined by a quadratic equation and by zero, one or several quadratic inequalities. The picture is cut by pa...surface algorithms; quadric patches1970
10 Henderson, Thomas C.Apparent symmetries in range dataA procedure for extracting symmetrical features from the output of a range scanner is described which is insensitive to sensor noise and robust with respect to object surface complexity. The acquisition of symmetry descriptors for rigid bodies from a range image was in this case motivated by the ne...Symmetry descriptors; Range data; Range scanner; Dextrous manipulation systems1987
11 Carter, Tony M.The set theory of arithmetic decompositionThe Set Theory of Arithmetic Decomposition is a method for designing complex addition/ subtraction circuits at any radix using strictly positional, sign-local number systems. The specification of an addition circuit is simply an equation that describes the inputs and the outputs as weighted digit se...Arithmetic decomposition; Addition/ subtraction circuits1989
12 Freire, Juliana; Silva, Claudio T.Provenance for computational tasks: a surveyThe problem of systematically capturing and managing provenance for computational tasks has recently received significant attention because of its relevance to a wide range of domains and applications. The authors give an overview of important concepts related to provenance management, so that poten...Provenance management; Computational tasks2008-05
13 Cohen, ElaineHidden curve removal for free form surfacesThis paper describes a hidden curve algorithm specifically designed for sculptured surfaces. A technique is described to extract the visible curves for a given scene without the need to approximate the surface by polygons. This algorithm produces higher quality results than polygon based algorithms,...Hidden curves; Free form surfaces; Sculptured surfaces1989
14 Michell, NickOn the potential of asynchronous pipelined processorsAn asynchronous version of the pipelined R3000 and DLX processors, the A3000, is being designed. Simulation was employed t o investigate the potential speed-up obtainable due t o the asynchronous operation. Preliminary results show up to a 64% improvement in performance.Pipelined processors; Pipelined R3000; DLX processors; A30001990
15 Parker, Steven G.; Smith, Philip J.; Johnson, Christopher R.Parallelization and integration of fire simulations in the Uintah PSEA physics-based stand-alone serial code for fire simulations is integrated in a unified computational framework to couple with other disciplines and to achieve massively parallel computation. Uintah, the computational framework used, is a component-based visual problem-solving environment developed...Uintah; Problem solving environment2001
16 Bhanu, BirRecognition of 2-D occluded objects and their manipulation by PUMA 560 robotA new method based on a cluster-structure paradigm is presented for the recognition of 2-D partially occluded objects. This method uses the line segments which comprise the boundary of an object in the recognition process. The length of each of these segments as well as the angle between successive ...PUMA 560 robot; Cluster-structure paradigm; 2-D partially occluded objects1985
17 Riesenfeld, Richard F.Discrete B-splines and subdivision techniques in compter-aided geometric design and computer graphicsThe relevant theory of discrete 5-sphnes with associated new algorithms is extended to provide a framework for understanding and implementing general subdivision schemes for nonuniform B-splines. The new derived polygon corresponding to an arbitrary refinement of the knot vector for an existing .B-...1979
18 Pascucci, ValerioEfficient data restructuring and aggregation for I/O acceleration in PIDXHierarchical, multiresolution data representations enable interactive analysis and visualization of large-scale simulations. One promising application of these techniques is to store high performance computing simulation output in a hierarchical Z (HZ) ordering that translates data from a Cartesian ...2012-01-01
19 Fujimoto, Richard M.A shared memory algorithm and proof for the alternative construct in CSPCommunicating Sequential Processes (CSP) is a paradigm for communication and synchronization among distributed processes. The alternative construct is a key feature of CSP that allows nondeterministic selection of one among several possible communicants. Previous algorithms for this construct assume...Shared memory algorithm; Communicating Sequential Processes; CSP1987
20 Hansen, Charles D.; Tasdizen, TolgaStatistically quantitative volume visualizationVisualization users are increasingly in need of techniques for assessing quantitative uncertainty and error in the images produced. Statistical segmentation algorithms compute these quantitative results, yet volume rendering tools typically produce only qualitative imagery via transfer function-base...Volume visualization; Uncertainty; Classification; Risk analysis2005
21 Shirley, Peter S.; Thompson, William B.Visual glueOne key function of graphics systems is to present information about the 3-D structure of modeled environments. For real-time simulations, conveying a sense of contact between touching surfaces and relative position and motion between proximate objects is particularly critical. Neither stereo nor oc...Visual glue; 3-D structure1998
22 Balasubramonian, RajeevUnderstanding the impact of 3D stacked layouts on ILP3D die-stacked chips can alleviate the penalties imposed by long wires within micro-processor circuits. Many recent studies have attempted to partition each microprocessor structure across three dimensions to reduce their access times. In this paper, we implement each microprocessor structure on a s...2007-01-01
23 Tinker, PeterManaging large address spaces effectively on the ButterflyThe BBN Butterfly? Parallel Processor is a commercially-available multiprocessor which uses a memory management strategy based on a segmentation of the available memory. Using all of the memory of the machine efficiently is difficult because of the need to change the memory mapping dynamically. This...BBN Butterfly Parallel Processor; Large address spaces1987
24 Hansen, Charles D.Penumbra maps: approximate soft shadows in real-timeGenerating soft shadows quickly is difficult. Few techniques have enough flexibility to interactively render soft shadows in scenes with arbitrarily complex occluders and receivers. This paper introduces the penumbra map, which extends current shadow map techniques to interactively approximate soft ...2003-01-01
25 Carter, John B.An O(1) time complexity software barrierAs network latency rapidly approaches thousands of processor cycles and multiprocessors systems become larger and larger, the primary factor in determining a barrier algorithm?s performance is the number of serialized network latencies it requires. All existing barrier algorithms require at least ...Network latency; Barrier algorithm; Time complexity software barrier2004
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