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Creator | Title | Description | Subject | Date |
101 |
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Organick, Elliott I. | Transformation of ADA programs into silicon (82 Mar. 1 - 82 Oct. 31) | This report outlines the beginning steps taken in an integrated research effort toward the development of a methodology, and supporting systems, for transforming Ada programs, or program units, (directly) into corresponding VLSI systems. The time seems right to expect good results. The need is evide... | Transformation; Silicon; Ada program units | 1982 |
102 |
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Fujimoto, Richard M.; Gopalakrishnan, Ganesh | Design and evaluation of the rollback chip: special purpose hardware for time warp | The Time Warp mechanism offers an elegant approach to attacking difficult clock synchronization problems that arise in applications such as parallel discrete event simulation. However, because Time Warp relies on a lookahead and rollback mechanism to achieve widespread exploitation of parallelism, t... | Rollback chip; Time Warp mechanism; Clock synchronization; Parallel discrete event simulation | 1988 |
103 |
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Gopalakrishnan, Ganesh | hopCP: A concurrent hardware description language | hopCP is a language for the specification, simulation, and synthesis of hardware systems. hopCP captures the behavior of a hardware system by specifying the causal relationships between actions that the system can perform. No specific timing discipline is implied by a hopCP specification. Hence, hop... | hopCP; Hardware systems | 1991 |
104 |
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Richardson, William F. | The Fred VHDL Model | This is the companion document to my dissertation. It contains 47 pages of schematics, and 163 pages of VHDL code. It is pretty meaningless without the dissertation, and it only exists because I felt that I should archive this information somewhere. | | 1995 |
105 |
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Akella, Venkatesh; Gopalakrishnan, Ganesh | Specification and validation of control intensive ICs in hopCP | Control intensive ICs pose a significant challenge to the users of formal methods in designing hardware. These ICs have to support a wide variety of requirements including synchronous and asynchronous operations polling and interrupt driven modes of operation multiple concurrent threads of executi... | Asynchrony; Behavioral simulation; Formal methods; Hardware description languages; Formal specifiation and validation; hopCP | 1992 |
106 |
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Henderson, Thomas C. | A systolic array implementation of discrete relaxation algorithm | Discrete Relaxation techniques have proven useful in solving a wide range of problems in digital signal processing, artificial intelligence, machine vision, and VLSI engineering, etc. A conventional hardware design for an 8-label 8-object Discrete Relaxation Algorithm (DRA) requires three 4K memory... | Discrete Relaxation algorithm; Systolic array | 1986 |
107 |
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Riesenfeld, Richard F.; Smith, Kent F. | An experimental system for computer aided geometric design | The main goal of this proposed level-of-effort project is to extend present capabilities in the area of Computer Aided Geometric Design (CAGD) and to develop custom VLSI support for some special geometric functions. | Computer aided geometric design; CAGD; VLSI; Very large scale integration | 1984 |
108 |
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Neff, Rick | Versatile interaction specification of tools and agents | Vista is a software infrastructure addressing the vexing problem of software tool interaction?especially how to get egocentric tools to work well together. Vista neither assumes nor requires that tools or tool-mediating agents understand a cooperative messaging protocol, only that they share some c... | Vista; software infrastructure; software tool interaction | 1994 |
109 |
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Carter, Tony M. | Ada-to-silicon compiler study (Final Report 30 Jan 85 - 30 Jun 86) | The vision of a system design environment in which both hardware and software components could be designed, tested, and executed was proffered by the late Dr. Elliott Organick1 in 1981. He was impressed by the objectiveness of Ada and the availability of an architecture (the Intel 432) which was sp... | ADA language | 1986 |
110 |
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Carter, Tony M.; Smith, Kent F. | Cell matrix methodologies for integrated circuit design | A class of integrated circuit design and implementation methodologies is described. These techniques are unique in that they simultaneously model both function and interconnect using cells. These cells are designed such that cell adjacency normally implies interconnection. The absence of an interco... | Integrated circuit design; Cell matrix | 1989 |