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Creator | Title | Description | Subject | Date |
276 |
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Orr, Douglas B. | Dynamic program monitoring and transformation using the OMOS object server | In traditional monolithic operating systems the constraints of working within the kernel have limited the sophistication of the schemes used to manage executable program images. By implementing an executable image loader as a persistent user-space program, we can extend system program loading capabi... | Program monitoring; Object/Meta-Object Server; OMOS | 1992 |
277 |
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Gopalakrishnan, Ganesh | Dynamic reordering of high latency transactions in time-warp simulation using a modified micropipeline | Time warp based simulation of discrete-event systems is an efficient way to overcome the synchronization overhead during distributed simulation. As computations may proceed beyond synchronization barriers in time warp, multiple checkpoints of state need to be maintained to be able to rollback inva... | Asynchronous design; Micropipelines; Dynamic instruction reordering; Time warp simulations | 1992 |
278 |
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Bargteil, Adam Wade | Dynamic sprites | Traditional methods for creating dynamic objects and characters from static drawings involve careful tweaking of animation curves and/or simulation parameters. Sprite sheets offer a more drawing-centric solution, but they do not encode timing information or the logic that determines how objects shou... | | 2014-01-01 |
279 |
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Bargteil, Adam Wade | Dynamic sprites | Traditional methods for creating dynamic objects and characters from static drawings involve careful tweaking of animation curves and/or simulation parameters. Sprite sheets offer a more drawing-centric solution, but they do not encode timing information or the logic that determines how objects shou... | | 2013-01-01 |
280 |
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Balasubramonian, Rajeev | Dynamically allocating processor resources between nearby and distant ILP | Modern superscalar processors use wide instruction issue widths and out-of-order execution in order to increase instruction-level parallelism (ILP). Because instructions must be committed in order so as to guarantee precise exceptions, increasing ILP implies increasing the sizes of structures s... | Instruction-level parallelism; Microarchitecture; Primary thread; Future thread; Instruction reuse buffer | 2001 |
281 |
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Balasubramonian, Rajeev | Dynamically managing the communication-parallelism trade-off in future clustered processors | Clustered microarchitectures are an attractive alternative to large monolithic superscalar designs due to their potential for higher clock rates in the face of increasingly wire-delay-constrained process technologies. As increasing transistor counts allow an increase in the number of clusters, th... | Clustered architectures; Microarchitecture; Decentralized cache; Interconnects | 2003 |
282 |
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Balasubramonian, Rajeev | Dynamically tunable memory hierarchy | The widespread use of repeaters in long wires creates the possibility of dynamically sizing regular on-chip structures. We present a tunable cache and translation lookaside buffer (TLB) hierarchy that leverages repeater insertion to dynamically trade off size for speed and power consumption on a per... | Microarchitecture; High performance microprocessors; Reconfigurable architectures; Energy and performance of on-chip caches; Translation lookaside buffer (TLB); Tunable cache | 2003-10 |
283 |
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Balasubramonian, Rajeev | Dynamically tuning processor resources with adaptive processing | Using adaptive processing to dynamically tune major microprocessor resources, developers can achieve greater energy efficiency with reasonable hardware and software overhead while avoiding undue performance loss. | Adaptive processing; Energy efficiency; DRI-cache | 2003-12 |
284 |
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Regehr, John | Edicts: implementing features with flexible binding times | In a software product line, the binding time of a feature is the time at which one decides to include or exclude a feature from a product. Typical binding site implementations are intended to support a single binding time only, e.g., compile time or run time. Sometimes, however, a product line must... | | 2008-01-01 |
285 |
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Brunvand, Erik L. | Editorial asynchronous architecture | Asynchronous design is enjoying a worldwide resurgence of interest following several decades in obscurity. Many of the early computers employed asynchronous design techniques, but since the mid 1970s almost all digital design has been based around the use of a central clock. The clock simplifies mos... | | 1996-01-01 |
286 |
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Balasubramonian, Rajeev | The effect of interconnect design on the performance of large L2 caches | The ever increasing sizes of on-chip caches and the growing domination of wire delay have changed the traditional design approach of the memory hierarchy. Many recent proposals advocate splitting the cache into a large number of banks and employ an on-chip network to allow fast access to nearby ban... | | 2006 |
287 |
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Riloff, Ellen M. | Effective information extraction with semantic affinity patterns and relevant regions | We present an information extraction system that decouples the tasks of finding relevant regions of text and applying extraction patterns. We create a self-trained relevant sentence classifier to identify relevant regions, and use a semantic affinity measure to automatically learn domain-relevant ex... | Information extraction; Semantic affinity patterns; Relevant regions; MUC-4 terrorism corpus; ProMed disease outbreak stories | 2007 |
288 |
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Willemsen, Peter; Gooch, Amy A.; Thompson, William B.; Creem-Regehr, Sarah Hope | Effects of stereo viewing conditions on distance perception in virtual environments | Several studies from different research groups investigating perception of absolute, egocentric distances in virtual environments have reported a compression of the intended size of the virtual space. One potential explanation for the compression is that inaccuracies and cue confliicts involving ... | Distance perception; Virtual environments; Stereo viewing conditions | 2005-02-15 |
289 |
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Lindstrom, Gary E. | Efficiency in nondeterministic control through non-forgetful backtracking | Nondeterministic (ND) control has long been used to express elegant solutions to complex search problems. Programs using ND control can be executed on conventional machines through a systematic examination of trial execution paths. Among the many approaches to the enumeration of these paths is backt... | Nondeterministic control; Non-forgetful backtracking; Search problems | 1977 |
290 |
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Pascucci, Valerio | Efficient data restructuring and aggregation for I/O acceleration in PIDX | Hierarchical, multiresolution data representations enable interactive analysis and visualization of large-scale simulations. One promising application of these techniques is to store high performance computing simulation output in a hierarchical Z (HZ) ordering that translates data from a Cartesian ... | | 2012-01-01 |
291 |
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Hansen, Charles D. | Efficient depth estimation using trinocular stereo | We present recent advancements in our passive trinocular stereo system. These include a technique for calibrating and rectifying in a very efficient and simple manner the triplets of images taken for trinocular stereovision systems. After the rectification of images, epipolar lines are parallel to t... | Trinocular stereo; Stereovision | 1988 |
292 |
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Fujimoto, Richard M. | Efficient instruction level simulation of computers | A technique for creating efficient, yet highly accurate, instruction level simulation models of computers is described. In contrast to traditional approaches that use a software interpreter, this technique employs direct execution of application programs on the host computer. An assembly language pr... | Simulation models | 1987 |
293 |
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Regehr, John | Efficient memory safety for TinyOS | Reliable sensor network software is difficult to create: applications are concurrent and distributed, hardware-based memory protection is unavailable, and severe resource constraints necessitate the use of unsafe, low-level languages. Our work improves this situation by providing efficient memory an... | | 2007-01-01 |
294 |
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Venkatasubramanian, Suresh | Efficient protocols for distributed classification and optimization | A recent paper [1] proposes a general model for distributed learning that bounds the communication required for learning classifiers with e error on linearly separable data adversarially distributed across nodes. In this work, we develop key improvements and extensions to this basic model. Our first... | | 2012-01-01 |
295 |
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Hansen, Charles D. | Efficient rendering of atmospheric phenomena | Rendering of atmospheric bodies involves modeling the complex interaction of light throughout the highly scattering medium of water and air particles. Scattering by these particles creates many well-known atmospheric optical phenomena including rainbows, halos, the corona, and the glory. Unfortunat... | | 2004 |
296 |
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Sudan, Kshitij | Efficient scrub mechanisms for error-prone emerging memories | Many memory cell technologies are being considered as possible replacements for DRAM and Flash technologies, both of which are nearing their scaling limits. While these new cells (PCM, STT-RAM, FeRAM, etc.) promise high density, better scaling, and non-volatility, they introduce new challenges. Solu... | | 2012-01-01 |
297 |
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Gopalakrishnan, Ganesh | Efficient search for inputs causing high floating-point errors | Tools for floating-point error estimation are fundamental to program understanding and optimization. In this paper, we focus on tools for determining the input settings to a floating point routine that maximizes its result error. Such tools can help support activities such as precision allocation, p... | | 2014-01-01 |
298 |
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Gopalakrishnan, Ganesh | Efficient symbolic simulation based verification using the parametric form of boolean expressions (rev.) | We present several new techniques to make symbolic simulation based verification efficient. These techniques hinge on the use of the parametric form of a boolean expression (e.g. the parametric form for the boolean expression XQ V -<xi is the equivalent expression 3a b . (XQ = a V 6) A (xi = b), whe... | Symbolic simulation; Verification | 1991 |
299 |
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Regehr, John | Efficient type and memory safety for tiny embedded systems | We report our experience in implementing type and memory safety in an efficient manner for sensor network nodes running TinyOS: tiny embedded systems running legacy, C-like code. A compiler for a safe language must often insert dynamic checks into the programs it produces; these generally make progr... | | 2006-01-01 |
300 |
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Henderson, Thomas C. | EGOR: design, development, implementation an entry in the 1994 AAAI robot competition | EGOR, an entry in the 1994 AAAI Robot Competition, was built by ate am from the Department of Computer Science at the University of Utah. The constraints imposed by the competition rules, and by cost and time, led to the development of a system composed of off-the- shelf parts based on a mobile bas... | EGOR; AAAI Robot Competition | 1994 |