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CreatorTitleDescriptionSubjectDate
226 Gopalakrishnan, GaneshDecomposing the proof of correctness of pipelined microprocessorsWe present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction function using completion functions, one per unfinished instruction, each of which specify the effect (on the observables) of ...Pipelined microprocessors; Proof of correctness1998
227 Nguyen, Hoa Thanh; Nguyen, Thanh Hoang; Freire, JulianaDeepPeep: A Form Search EngineWe present DeepPeep (http://www.deeppeep.org), a new search engine specialized in Web forms. DeepPeep uses a scalable infrastructure for discovering, organizing and analyzing Web forms which serve as entry points to hidden-Web sites. DeepPeep provides an intuitive interface that allows users t...
228 Bargteil, Adam WadeDeformation embedding for point-based elastoplastic simulationWe present a straightforward, easy-to-implement, point-based approach for animating elastoplastic materials. The core idea of our approach is the introduction of embedded space-the least-squares best fit of the material's rest state into three dimensions. Nearest neighbor queries in the embedded spa...2014-01-01
229 Regehr, JohnDeriving abstract transfer functions for analyzing embedded softwareThis paper addresses the problem of creating abstract transfer functions supporting dataflow analyses. Writing these functions by hand is problematic: transfer functions are difficult to understand, difficult to make precise, and difficult to debug. Bugs in transfer functions are particularly seriou...2006-01-01
230 Gopalakrishnan, GaneshDeriving efficient cache coherence protocols through refinementWe address the problem of developing efficient cache coherence protocols for use in distributed systems implementing distributed shared memory (DSM) using message passing. A serious drawback of traditional approaches to this problem is that the users are required to state the desired coherence prot...Cache coherence protocols; DSM; Message passing1997
231 Zhang, LixinDescription of functionality of the impulse memory controllerThis document describes the functionality and control flow models for each component of the impulse main memory controller.Impulse memory controller2001
232 Zhang, LixinDesign a DRAM backend for the impulse memory systemThe Impulse Adaptable Memory System is a new memory system that exposes DRAM access patterns not seen in conventional memory systems. Impulse can generate huge number of small DRAM accesses, which will not be handled effectively by a conventional cache-line-size-access-oriented DRAM backend. In this...DRAM; Backend; Impulse memory system; Impulse Adaptable Memory System; Access patterns2000
233 Carter, John B.Design alternatives for shared memory multiprocessorsIn this paper. we consider the design alternatives available for building the next generation DSM machine (e.g., the choice of memory architecture, network technology, and amount and location of per-node remote data cache). To investigate this design space, we have simulated six applications on a wi...Shared memory multiprocessors1998
234 Fujimoto, Richard M.; Gopalakrishnan, GaneshDesign and evaluation of the rollback chip: special purpose hardware for time warpThe Time Warp mechanism offers an elegant approach to attacking difficult clock synchronization problems that arise in applications such as parallel discrete event simulation. However, because Time Warp relies on a lookahead and rollback mechanism to achieve widespread exploitation of parallelism, t...Rollback chip; Time Warp mechanism; Clock synchronization; Parallel discrete event simulation1988
235 Dintelman, Sue Marie ThompsonDesign and implementation of a relational data base system for a minicomputerA data base system provides the advantages of centralized control of data including increased data independence. Design specifications for a low level relational data base interface are given in the form of a formal description which separates the implementation details from the description of the ...Data base system1977
236 Jacobson, HansDesign and validation of a simultaneous multi-threaded DLX processorModern day computer systems rely on two forms of parallelism to achieve high performance, parallelism between individual instructions of a program (ILP) and parallelism between individual threads (TLP). Superscalar processors exploit ILP by issuing several instructions per clock, and multiprocessors...DLX processor; Validation1999
237 Gopalakrishnan, GaneshDesign and verification of the rollback chip using HOP: a case study of formal methods applied to hardware designThe use of formal methods in hardware design improves the quality of designs in many ways: it promotes better understanding of the design; it permits systematic design refinement through the discovery of invariants; and it allows design verification (informal or formal). In this paper we illustrate ...Rollback chip; Verification; HOP; Hardware design; RBC1990
238 Hansen, Charles D.Design of 2D time-varying vector fieldsDesign of time-varying vector fields, i.e., vector fields that can change over time, has a wide variety of important applications in computer graphics. Existing vector field design techniques do not address time-varying vector fields. In this paper, we present a framework for the design of time-vary...2012-01-01
239 Carter, John B.Design of a parallel vector access unit for SDRAM memory systemsParallel Vector Access is a technique that exploits the regularity of vector or stream accesses to perform them efficiently in parallel on a multi-bank memory system. The performance of applications that have vector accesses may be improved using a memory controller that performs scatter/gather oper...Parallel vector access; SDRAM memory; Multi-bank memory system1999
240 Lindstrom, Gary E.The design of object-oriented meta-architectures for programming languagesThis paper is a survey of the design of four object-oriented meta-level architectures for programming languages. We present overviews and compare the salient features of the meta-architectures of Smalltalk, Common Lisp Object System (CLOS), a Scheme Compiler, and Etyma, our framework for modular sy...Meta-level architectures; Design1994
241 Freier, Rodney; Thompson, William B.Design-space exploration of most-recent-only communication using myrinet on SGI ccNUMA architecturesSGI's current ccNUMA multiprocessor architectures offer high scalability and performance without sacrificing the ease of use of simpler SMP systems. Although these systems also provide a standard PCI expansion bus, the bridging between PCI and SGI's ccNUMA architecture invalidates the assumptions ty...Most-recent-only communication; Myrinet; SGI; Communications latencies1999
242 Freire, JulianaDesigning information-preserving mapping schemes for XMLAn XML-to-relational mapping scheme consists of a procedure for shredding XML documents into relational databases, a procedure for publishing databases back as documents, and a set of constraints the databases must satisfy. In previous work, we discussed two notions of information preservation for m...Losslessness; Validation; Mapping scheme; Edge++; LILO; Lossless Inlining; Lossless Outlining; XML Schema2005
243 Bruderlin, BeatDetecting ambiguities: an optimistic approach to robustness problems in computational geometryComputational geometry algorithms deal with geometric objects, usually represented by coordinates in an n-dimensional Euclidean space. Most efficient algorithms implement geometric operations as floating point arithmetic operations on the coordinates. Since floating point numbers can only approxima...Ambiguities; Computational geometry; Robustness problems1990
244 Kasera, Sneha K.Detecting receiver attacks in VRTI-based device free localizationVariance-based Radio Tomographic Imaging (VRTI) is an emerging technology that locates moving objects in areas surrounded by simple and inexpensive wireless sensor nodes. VRTI uses human motion induced variation in RSS and spatial correlation between link variations to locate and track people. An ar...2012-01-01
245 Brunvand, Erik L.DFT for fast testing of self-timed control circuitsIn this paper, we present a methodology to perform fast testing of the control path of self-timed circuits [91]. The speedup is achieved by testing all the execution paths in the control simultaneously. The circuits considered in this paper are those designed using an OCCAM based circuit compile...1995
246 Bruderlin, BeatDI - An object-oriented user interface toolbox for modula-2 applicationsThe DI dialog interface tool library for Modula-2 applications described in this paper facilitates the design and implementation of graphical, object-oriented user interfaces for workstations with a graphical screen, a mouse and a keyboard. Much emphasis is put on the portability of the application...DI dialog interface tool1990
247 Faugeras, Olivier DominiqueDigital color image processing and psychophysics within the framework of a human visual modelA three-dimensional homomorphic model of human color vision based on neurophysiological and psychophysical evidence is presented. This model permits the quantitative definition of perceptually important parameters such as brightness. saturation, huo and strength. By modelling neural interaction in t...Human visual model; Neurophysiological evidence; Psychophysical evidence1977
248 Colas-Baudelaire, PatrickDigital picture processing and psychophysics: a study of brightness perceptionA computer driven display system was used to study brightness contrast phenomena, in a project motivated by research in digital picture processing. The modeling approach was that of Stockham and Davidson: the visual system is modeled as the cascade of a linear system (eye optics) and a multiplicati...Digital picture processing; Computer driven display system; Brightness contrast1974
249 Stoller, Leigh B.Direct deposit: a basic user-level protocol for carpet clusters?This note describes the Direct Deposit Protocol (DDP), a simple protocol for multicomputing on a carpet cluster. This protocol is an example of a user-level protocol to be layered on top of the low-level, sender-based protocols for the Protocol Processing Engine. The protocol will be described in te...Direct Deposit Protocol; DDP; Carpet clusters; Multicomputing; User-level protocol1995
250 Regehr, John; Pagariya, Rohit PannalaljiDirect equivalence testingTesting embedded software is difficult. • Further complicated by presence of memory and type safety errors in software. • Compiler contain various known bugs. Developers are skeptical to upgrade the compilers. • Is your embedded software affected by memory safety and compilation erro...
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