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CreatorTitleDescriptionSubjectDate
1 Carter, John B.; Davis, Al; Kuramkote, Ravindra; Stoller, Leigh B.Avalanche: A communication and memory architecture for scalable parallel computingAs the gap between processor and memory speeds widens?? system designers will inevitably incorpo rate increasingly deep memory hierarchies to maintain the balance between processor and memory system performance At the same time?? most communication subsystems are permitted access only to main m...Avalanche; Communication architecture; Memory architecture1995
2 Richardson, William F.Fred: an architecture for a self-timed decoupled computerDecoupled computer architectures provide an effective means of exploiting instruction level parallelism. Self-timed micropipeline systems are inherently decoupled due to the elastic nature of the basic FIFO structure, and may be ideally suited for constructing decoupled computer architectures. Fred ...Decoupled computer; Fred1995
3 Brunvand, Erik L.Precise exception handling for a self-timed processorSelf-timed systems structured as multiple concurrent processes and communicating through self-timed queues are a convenient way to implement decoupled computer architectures. Machines of this type can exploit instruction level parallelism in a natural way, and can be easily modified and extended...1995
4 Carter, John B.Avalanche: A communication and memory architecture for scalable parallel computingAs the gap between processor and memory speeds widens, system designers will inevitably incorporate increasingly deep memory hierarchies to maintain the balance between processor and memory system performance. At the same time, most communication subsystems are permitted access only to main memory ...Avalanche; Computer memory; Memory architecture1995
5 Carter, John B.Reducing consistency traffic and cache misses in the avalanche multiprocessorFor a parallel architecture to scale effectively, communication latency between processors must be avoided. We have found that the source of a large number of avoidable cache misses is the use of hardwired write-invalidate coherency protocols, which often exhibit high cache miss rates due to exces...Consistency traffic; Cache misses; Parallel architecture; Communication latency1995
6 Warner, Homer R.Enroute Toward a Computer-Based Patient Record: The ACIS ProjectBiomedical Informatics1995
7 Lindstrom, Gary E.Layered, server-based support for Object-Oriented application developmentThis paper advocates the idea that the physical modularity (file structure) of application components supported by conventional OS environments can be elevated to the level of logical modularity, which in turn can directly support application development in an object-oriented manner. We demonstrate ...Object-Oriented application development1995
8 Sperry, John S.Hydraulic architecture of palmsThe water transport and storage system of palms is adapted to maintain the primary stem xylem functional over the life of the shoot, and in spite of severe drought. However, our structural information far exceeds our knowledge of vascular function, and these functional considerations bring more que...Hydraulic architecture; Rhapis excelsa; Cavitation1995
9 Efros, Alexei L.Sensor-based distributed control scheme for mobile robotsIn this paper we present a sensor-based distributed control scheme for mobile robots. This scheme combines centralized and decentralized control strategies. A server-client model is used to implement this scheme where the server is a process that caries out the commands to be executed, and each clie...Sensor-based; Distributed control scheme1995
10 Clayton, Paul D.Presentation of the Morris F. Collen Award to Homer R. Warner, MD, PhD: "Why Not! Let's Do It!"Biomedical Informatics1995
11 Coley, Phyllis D.What's up? Perspectives from the first international forest canopy conference at Sarasota, Florida, 1994Jumars, caribineers, pole pruners, tree bicycles, Bosun's chairs, booms, peconhas . . . these terms are not listed in most biological dictionaries. Nor are construction cranes or large treehouses or hot-air dirigibles listed as priority equipment for any scientific laboratories. But these are th...1995
12 Lindstrom, Gary E.Object-oriented programming in scheme with first-class modules and operator-based inheritanceWe characterize object-oriented programming as structuring and manipulating a uniform space of first-class values representing modules, a distillation of the notion of classes. Operators over modules individually achieve effects such as encapsulation, sharing, and static binding. A variety of idioms...First-class modules; Operator-based inheritance1995
13 Brown, Don R.The design and implementation of partnetPartNet is a federated database for providing interactive online access to mechanical parts catalogs. The data contained in the vendor's product database is exported to the federated database using a networkbased distributed database protocol. A Single coherent view of these vendor databases is pro...1995
14 Gopalakrishnan, GaneshTiming constraints for high speed counterflow-clocked pipeliningWith the escalation of clock frequencies and the increasing ratio of wire- to gate-delays, clock skew is a major problem to be overcome in tomorrow's high-speed VLSI chips. Also, with an increasing number of stages switching simultaneously comes the problem of higher peak power consumption. In our ...Timing constraints; clock frequencies; clock skew; high-speed; VLSI chips; counterflow-clocked pipelining1995
15 Brunvand, Erik L.A comparison of modular self-timed design stylesState-machine sequencing methods in modular 2-phase and 4-phase asynchronous handshake control are compared. Design styles are discussed, and the sequencers are tested against each other using a medium-scale minicomputer test design implemented in FPGAs. Seven 4-phase sequencers are tested. In these...Self-timed; State-machine sequencing; Asynchronous handshake control1995
16 Weinstein, DavidHierarchical data structures for interactive volume visualizationIn order to interactively investigate large-scale 3D data sets, we propose an improved hierarchical data structure for structured grids and an original hierarchical d a t a structure for unstructured grids. These multi-tiered implementations allow the user to interactively control both the local and...Hierarchical data structures; Volume visualization; 3D data sets1995
17 Vardeny, Zeev ValentinePhotoresponse and electroresponse of polymers light emitting diodesWe have studied the photoresponse and electroresponse of light emitting diodes (LEDs ) made from a variety of soluble conducting polymers sandwiched between indium tin oxide (ITO) and metals including calcium, aluminum and copper. Under illumination all freshly prepared LEDs exhibit relatively large...Photoresponse; Electroresponse; Photovoltage; I-V curves1995
18 Richardson, William F.The Fred VHDL ModelThis is the companion document to my dissertation. It contains 47 pages of schematics, and 163 pages of VHDL code. It is pretty meaningless without the dissertation, and it only exists because I felt that I should archive this information somewhere.1995
19 Brunvand, Erik L.A partial scan methodology for testing self-timed circuitsThis paper presents a partial scan method for testing control sections of macromodule based self-timed circuits for stuck-at faults. In comparison with other proposed test methods for self-timed circuits, this technique offers better fault coverage than methods using self-checking techniques, and ...1995
20 Brunvand, Erik L.Automatic rapid prototyping of semi-custom VLSI circuits using actel FPGAsAbstract : We describe a technique for translating semi-custom VLSI circuits automatically into field programmable gate arrays (FPGAs) for rapid prototyping to develop a system. Using an array multiplier as an example of this translation, the VLSI circuits are designed using a cell-matrix based envi...1995
21 Gopalakrishnan, Ganesh; Henderson, Thomas C.Modeling and verification of distributed control scheme for mobile robotsIn this report we present a sensor-based distributed control scheme for mobile robots. This scheme combines centralized and decentralized control strategies. Each group of sensors is considered to be a process that performs sensing and carries out local control tasks as well. Besides these processes...Distributed control scheme; Sensor-based1995
22 Brunvand, Erik L.Testing self-timed circuits using partial scanThis paper presents a partial scan method for testing both the control and data path parts of macromodule based self-timed circuits for stuck-at faults. Compared with other proposed test methods for testing control paths in self-timed circuits, this technique offers better fault coverage under a st...1995
23 Hibler, Michael J.Using annotated interface definitions to optimize RPCIn RPC-based communication, it is useful to distinguish the RPC interface, which is the "network contract" between the client and the server, from the presentation, which is the "programmer's contract" between the RPC stubs and the code that calls or is called by them. Presentation is usually a fixe...annotated interface definitions; RPC-based communication1995
24 Mathews, V. JohnA new model of perceptual threshold functions for application in image compression systemsThis paper discusses the development of a perceptual threshold model for the human visual system. The perceptual threshold functions describe the levels of distortions present at each location in an image that human observers can not detect. Models of perceptual threshold functions are useful in ima...1995
25 Hibler, Michael J.Separating presentation from interface in RPC and IDLsIn RPC-based communication, we term the interface the set of remote procedures and the types of their arguments; the presentation is the way these procedures and types are mapped to the target language environment in a particular client or server, including semantic requirements. For example, pres...RPC-based communication; IDL; Presentation; Interface1995
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